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Research Output 1981 2019

2019

Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications

Zhang, F., Zhai, J., Snir, M., Jin, H., Kasahara, H. & Valero, M., 2019 Jan 1, In : International Journal of Parallel Programming.

Research output: Contribution to journalEditorial

Open Access
Parallel processing systems
Parallel Computing
Architecture
2018

Preface

Zhang, F., Zhai, J., Snir, M., Jin, H., Kasahara, H. & Valero, M., 2018 Jan 1, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 11276 LNCS, p. V

Research output: Contribution to journalEditorial

2017

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, Vol. 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10136 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory Management
Data storage equipment
Multi-core Processor
Compiler
Multidimensional Data

Message from the CAP 2017 Organizing Committee

Seceleanu, C., Kasahara, H. & Seceleanu, T., 2017 Sep 7, In : Proceedings - International Computer Software and Applications Conference. 1, 1 p., 8029643.

Research output: Contribution to journalEditorial

Multicore Cache Coherence Control by a Parallelizing Compiler

Kasahara, H., Kimura, K., Adhi, B. A., Hosokawa, Y., Kishimoto, Y. & Mase, M., 2017 Sep 7, Proceedings - 2017 IEEE 41st Annual Computer Software and Applications Conference, COMPSAC 2017. IEEE Computer Society, Vol. 1. p. 492-497 6 p. 8029648

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Computer hardware
Computer systems
Data storage equipment
2016

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 Dec 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sampling
Simulators

Android video processing system combined with automatically parallelized and power optimized code by OSCAR compiler

Binh, B. D., Hirano, T., Mikami, H., Yamamoto, H., Kimura, K. & Kasahara, H., 2016, In : Journal of Information Processing. 24, 3, p. 504-511 8 p.

Research output: Contribution to journalArticle

Processing
Electric power utilization
Demonstrations
Optical flows
Power control
1 Citation (Scopus)

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 Nov 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wireless sensor networks
Snow
Monitoring
Civil engineering
Springs (water)

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Earthquake
Parallelization
Compiler
Earthquakes
Simulator

Kasahara Voted 2017 Computer Society President-Elect

Kasahara, H. & Gaudiot, J. L., 2016 Dec 1, Computer, 49, 12, p. 90-92 3 p.

Research output: Contribution to specialist publicationArticle

Governors
3 Citations (Scopus)

Multigrain parallelization for model-based design applications using the OSCAR compiler

Umeda, D., Suzuki, T., Mikami, H., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 125-139 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Model-based Design
Parallelization
Compiler
Parallelism
Matlab/Simulink

Reducing parallelizing compilation time by removing redundant analysis

Han, J. X., Fujino, R., Tamura, R., Shimaoka, M., Mikami, H., Takamura, M., Kamiya, S., Suzuki, K., Miyajima, T., Kimura, K. & Kasahara, H., 2016 Oct 21, SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Association for Computing Machinery, Inc, p. 1-9 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Information analysis
Computer systems
2015

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 Oct 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Jitter
Linux
Synchronization
Computer systems
Tuning
1 Citation (Scopus)

Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K. & Kasahara, H., 2015, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 8967. p. 239-252 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8967).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power Control
Cortex
Power control
Compiler
Electric power utilization
1 Citation (Scopus)

Parallelization of tree-to-TLV serialization

Nakayama, M., Yamazaki, K., Tanaka, S. & Kasahara, H., 2015 Jan 20, 2014 IEEE 33rd International Performance Computing and Communications Conference, IPCCC 2014. Institute of Electrical and Electronics Engineers Inc., Vol. 2014-January. 7017059

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Processing
Containers
8 Citations (Scopus)

What Will 2022 Look Like? The IEEE CS 2022 Report

Alkhatib, H., Faraboschi, P., Frachtenberg, E., Kasahara, H., Lange, D., Laplante, P., Merchant, A., Milojicic, D. & Schwan, K., 2015 Mar 1, In : Computer. 48, 3, p. 68-76 9 p., 7063168.

Research output: Contribution to journalArticle

Industry
1 Citation (Scopus)

OSCAR compiler controlled multicore power reduction on android platform

Yamamoto, H., Hirano, T., Muto, K., Mikami, H., Goto1, T., Hillenbrand, D., Takamura, M., Kimura, K. & Kasahara, H., 2014, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 8664. p. 155-168 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8664).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Compiler
Power Consumption
Electric power utilization
Multi-core Processor
Clocks
2013
1 Citation (Scopus)

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power control
Mobile devices

Dynamic profiling and feedback framework for reduce-side join

Nakayama, M., Yamazaki, K., Tanaka, S. & Kasahara, H., 2013, Proceedings - 16th IEEE International Conference on Computational Science and Engineering, CSE 2013. p. 1255-1262 8 p. 6755369

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Feedback
Servers
1 Citation (Scopus)

Evaluation of power consumption at execution of multiple automatically parallelized and power controlled media applications on the RP2 low-power multicore

Mikami, H., Kitaki, S., Mase, M., Hayashi, A., Shimaoka, M., Kimura, K., Edahiro, M. & Kasahara, H., 2013, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 7146 LNCS. p. 31-45 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7146 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power Consumption
Electric power utilization
Evaluation
Encoder
Parallel Processing
3 Citations (Scopus)

Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler

Kanehagi, Y., Umeda, D., Hayashi, A., Kimura, K. & Kasahara, H., 2013, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547921

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Engines
Integrated control
Control systems
Automobiles
Real time control
3 Citations (Scopus)

Reconciling application power control and operating systems for optimal power and performance

Hillenbrand, D., Furuyama, Y., Hayashi, A., Mikami, H., Kimura, K. & Kasahara, H., 2013, 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013. 6581539

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power control
Control systems
Level control
Hardware
Mobile devices
2012

Enhancing the performance of a multiplayer game by using a parallelizing compiler

Al-Dosary, Y. I. M., Kimura, K., Kasahara, H. & Narita, S., 2012, Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games. p. 67-75 9 p. 6314554

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hazards
Parallel programming
Computer applications
Costs
Experiments
5 Citations (Scopus)

Heterogeneous multicore processor technologies for embedded systems

Uchiyama, K., Arakawa, F., Kasahara, H., Nojiri, T., Noda, H., Tawara, Y., Idehara, A., Iwata, K. & Shikano, H., 2012 Oct 1, Springer New York. 224 p.

Research output: Book/ReportBook

Embedded systems
Program processors
Computer operating systems
Application programs
Computer hardware
2011

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 Apr, In : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

Research output: Contribution to journalArticle

Physical addresses
Engines
Data storage equipment
Data transfer
Processing

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6760 LNCS. p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6760 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallelizing Compilers
Multi-core Processor
Particle accelerators
Electric power utilization
Application programs
9 Citations (Scopus)

Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores

Hayashi, A., Wada, Y., Watanabe, T., Sekiguchi, T., Mase, M., Shirako, J., Kimura, K. & Kasahara, H., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6548 LNCS. p. 184-198 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6548 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallelizing Compilers
Application programming interfaces (API)
Productivity
Real-time
Particle accelerators
2010
28 Citations (Scopus)

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 53. p. 100-101 2 p. 5434031

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Image recognition
Electric power utilization
Consumer electronics
Optical flows
18 Citations (Scopus)

OSCAR API for real-time low-power multicores and its performance on multicores and SMP servers

Kimura, K., Mase, M., Mikami, H., Miyamoto, T., Shirako, J. & Kasahara, H., 2010, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5898 LNCS. p. 188-202 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5898 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multiprocessor
Application programming interfaces (API)
Servers
Server
Real-time
2009
1 Citation (Scopus)

Green multicore-SoC software-execution framework with timely-power-gating scheme

Onouchi, M., Toyama, K., Nojiri, T., Sato, M., Mase, M., Shirako, J., Sato, M., Takada, M., Ito, M., Mizuno, H., Namiki, M., Kimura, K. & Kasahara, H., 2009, Proceedings of the International Conference on Parallel Processing. p. 510-517 8 p. 5362472

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Software
Scalability
Cache
Power Consumption
Electric power utilization
2 Citations (Scopus)

Multiple-paths search with concurrent thread scheduling for fast AND/OR tree search

Takano, F., Maekawa, Y. & Kasahara, H., 2009, Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems, CISIS 2009. p. 51-58 8 p. 5066768

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scheduling
1 Citation (Scopus)

Parallel and concurrent search for fast AND/OR tree search on multicore processors

Takano, F., Maekawa, Y. & Kasahara, H., 2009, Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2009. p. 139-144 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Electric power utilization
ARM processors
Supercomputers
Navigation systems
2008
32 Citations (Scopus)

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 51. 4523071

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Random access storage
Program processors
Power control
Synchronization
Processing
15 Citations (Scopus)

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 Jan, In : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

Research output: Contribution to journalArticle

Program processors
Particle accelerators
Memory architecture
Computer programming
Embedded systems
6 Citations (Scopus)

Language extensions in support of compiler parallelization

Shirako, J., Kasahara, H. & Sarkar, V., 2008, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5234 LNCS. p. 78-94 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5234 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Privatization
Object oriented programming
Parallelization
Compiler
Software engineering
5 Citations (Scopus)

Parallelization with automatic parallelizing compiler generating consumer electronics multicore API

Miyamoto, T., Asaka, S., Mikami, H., Mase, M., Wada, Y., Nakano, H., Kimura, K. & Kasahara, H., 2008, Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008. p. 600-607 8 p. 4725200

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Consumer electronics
Application programs
Interfaces (computer)
Navigation systems
Mobile phones
2 Citations (Scopus)

Performance evaluation of compiler controlled power saving scheme

Shirako, J., Yoshida, M., Oshiyama, N., Wada, Y., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2008, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4759 LNCS. p. 480-493 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4759 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power Saving
Compiler
Percent
Parallelism
Performance Evaluation
1 Citation (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 Apr, In : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

Research output: Contribution to journalArticle

Power control
Program processors
Electric power utilization
Particle accelerators
Clocks

Power Reduction Controll for Multicores in OSCAR Multigrain Parallelizing Compiler

Shirako, J., Kimura, K. & Kasahara, H., 2008, 2008 International SoC Design Conference, ISOCC 2008. Vol. 1. 4815571

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Computer architecture
Consumer electronics
Decoding
Microprocessor chips
7 Citations (Scopus)

Software-cooperative power-efficient heterogeneous multi-core for media processing

Shikano, H., Ito, M., Uchiyama, K., Odaka, T., Hayashi, A., Masuura, T., Mase, M., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. p. 736-741 6 p. 4484049

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Processing
Particle accelerators
Electric power utilization
Energy utilization
2007
24 Citations (Scopus)

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 4242284

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Electric power utilization
Processing
System-on-chip
7 Citations (Scopus)

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2007, IEEE Symposium on VLSI Circuits, Digest of Technical Papers. p. 18-19 2 p. 4342719

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Memory architecture
Computer programming
Embedded systems
1 Citation (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2007, Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT. p. 427 1 p. 4336255

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2006
16 Citations (Scopus)

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4339 LNCS. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4339 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric Power Supplies
Power Saving
Multi-core Processor
Energy Saving
Power control
2005
12 Citations (Scopus)

Hierarchical parallelism control for multigrain parallel processing

Obata, M., Shirako, J., Kaminaga, H., Ishizaka, K. & Kasahara, H., 2005, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 2481 LNCS. p. 31-44 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2481 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallel Processing
Parallelism
Processing
Subroutines
Servers
13 Citations (Scopus)

Multigrain parallel processing on compiler cooperative chip multiprocessor

Kimura, K., Wada, Y., Nakano, H., Kodaka, T., Shirako, J., Ishizaka, K. & Kasahara, H., 2005, Proceedings - Annual Workshop on Interaction between Compilers and Computer Architectures, INTERACT. Vol. 2005. p. 11-21 11 p. 1423137

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Processing
Data transfer
Cost effectiveness
Scalability
5 Citations (Scopus)

Performance of OSCAR multigrain parallelizing compiler on SMP servers

Ishizaka, K., Miyamoto, T., Shirako, J., Obata, M., Kimura, K. & Kasahara, H., 2005, Lecture Notes in Computer Science. Eigenmann, R., Li, Z. & Midkiff, S. P. (eds.). Vol. 3602. p. 319-331 13 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sun
Servers
Fires
Subroutines
Data storage equipment
2004
4 Citations (Scopus)
Solar System
Parallel Processing
Compiler
Sun
Cache