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Research Output 1981 2019

24 Citations (Scopus)

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 4242284

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Clocks
Electric power utilization
Processing
System-on-chip
29 Citations (Scopus)

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 53. p. 100-101 2 p. 5434031

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Image recognition
Electric power utilization
Consumer electronics
Optical flows

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 Apr, In : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

Research output: Contribution to journalArticle

Physical addresses
Engines
Data storage equipment
Data transfer
Processing

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 Dec 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sampling
Simulators
10 Citations (Scopus)

A data-localization compilation scheme using partial-static task assignment for Fortran coarse-grain parallel processing

Kasahara, H. & Yoshida, A., 1998 May, In : Parallel Computing. 24, 3-4, p. 579-596 18 p.

Research output: Contribution to journalArticle

Task Assignment
Compilation
Parallel Processing
Partial
Data storage equipment
11 Citations (Scopus)

A multi-grain parallelizing compilation scheme for OSCAR (Optimally scheduled advanced multiprocessor)

Kasahara, H., Honda, H., Mogi, A., Ogura, A., Fujiwara, K. & Narita, S., 1992 Jan 1, Languages and Compilers for Parallel Computing - 4th International Workshop, Proceedings. Springer-Verlag, p. 283-297 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 589 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Compilation
Multiprocessor
Parallelism
Subroutines
Parallel Processing
32 Citations (Scopus)

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 51. 4523071

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Random access storage
Program processors
Power control
Synchronization
Processing

Android video processing system combined with automatically parallelized and power optimized code by OSCAR compiler

Binh, B. D., Hirano, T., Mikami, H., Yamamoto, H., Kimura, K. & Kasahara, H., 2016, In : Journal of Information Processing. 24, 3, p. 504-511 8 p.

Research output: Contribution to journalArticle

Processing
Electric power utilization
Demonstrations
Optical flows
Power control

An efficient OR-parallel processing scheme of Prolog: Hierarchical pincers attack search

Kai, M. & Kasahara, H., 1991 Dec 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings. Anon (ed.). Publ by IEEE, p. 677-680 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data transfer
Processing

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 Oct 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Jitter
Linux
Synchronization
Computer systems
Tuning

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6760 LNCS. p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6760 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallelizing Compilers
Multi-core Processor
Particle accelerators
Electric power utilization
Application programs

APPLICATION OF DF/IHS TO MINIMUM TOTAL WEIGHTED FLOW TIME MULTIPROCESSOR SCHEDULING PROBLEMS.

Kasahara, H., Kai, M., Narita, S. & Wada, H., 1988 Jun, In : Systems and Computers in Japan. 19, 6, p. 25-34 10 p.

Research output: Contribution to journalArticle

Multiprocessor Scheduling
Flow Time
Heuristic Search
Scheduling Problem
Scheduling

Application of Parallel Processing to PWR Plant Predictive Simulator

Sasaki, K., Kanamaru, H., Kasahara, H. & Narita, S., 1990, In : Nippon Genshiryoku Gakkaishi/Journal of the Atomic Energy Society of Japan. 32, 10, p. 1009-1022 14 p.

Research output: Contribution to journalArticle

Simulators
Processing
Nuclear power plants
Loss of coolant accidents
Steam generators
7 Citations (Scopus)

APPROACH TO SUPERCOMPUTING USING MULTIPROCESSOR SCHEDULING ALGORITHMS.

Kasahara, H. & Narita, S., 1985, Unknown Host Publication Title. New York, NY, USA: IEEE, p. 139-148 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scheduling algorithms
Scheduling
Parallel processing systems
Processing
Robots
1 Citation (Scopus)

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 Nov 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wireless sensor networks
Snow
Monitoring
Civil engineering
Springs (water)
100 Citations (Scopus)

A standard task graph set for fair evaluation of multiprocessor scheduling algorithms

Tobita, T. & Kasahara, H., 2002 Sep, In : Journal of Scheduling. 5, 5, p. 379-394 16 p.

Research output: Contribution to journalArticle

Scheduling algorithms
Heuristic algorithms
Evaluation
Graph
10 Citations (Scopus)

Automatic coarse grain task parallel processing on SMP using openMP

Kasahara, H., Obata, M. & Ishizaka, K., 2001, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 2017. p. 189-207 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

OpenMP
Parallel Processing
Compiler
Thread
Processing

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, Vol. 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10136 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Memory Management
Data storage equipment
Multi-core Processor
Compiler
Multidimensional Data
1 Citation (Scopus)

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power control
Mobile devices
4 Citations (Scopus)
Solar System
Parallel Processing
Compiler
Sun
Cache
3 Citations (Scopus)

Coarse grain parallelism detection scheme of a fortran program

Honda, H. & Kasahara, H., 1991, In : Systems and Computers in Japan. 22, 12, p. 24-36 13 p.

Research output: Contribution to journalArticle

Parallelism
Data Dependence
Scheduling
Concepts

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Earthquake
Parallelization
Compiler
Earthquakes
Simulator
5 Citations (Scopus)

Coarse-grain task parallel processing using the openMP backend of the OSCAR multigrain parallelizing compiler

Ishizaka, K., Obata, M. & Kasahara, H., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1940. p. 457-470 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1940).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallelizing Compilers
OpenMP
Parallel Processing
Parallelism
Processing
2 Citations (Scopus)
Shared-memory multiprocessors
Parallel Processing
Cache
Parallelism
Data storage equipment
1 Citation (Scopus)

Compilation scheme for near fine grain parallel processing on a multiprocessor system without explicit synchronization

Ogata, W., Fujimoto, K., Oota, M. & Kasahara, H., 1995, IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE, p. 327-332 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Synchronization
Processing
Data transfer
Scheduling algorithms
Macros
16 Citations (Scopus)

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4339 LNCS. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4339 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric Power Supplies
Power Saving
Multi-core Processor
Energy Saving
Power control
8 Citations (Scopus)

Data-localization for Fortran macro-dataflow computation using partial static task assignment

Yoshida, A., Koshizuka, K. & Kasahara, H., 1996, Proceedings of the International Conference on Supercomputing. New York, NY, United States: ACM, p. 61-68 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Data storage equipment
Data transfer
Subroutines
Scheduling

Data-localization scheduling inside processor-cluster for multigrain parallel processing

Yoshida, A., Koshizuka, KI., Ogata, W. & Kasahara, H., 1997, In : IEICE Transactions on Information and Systems. E80-D, 4, p. 473-478 6 p.

Research output: Contribution to journalArticle

Scheduling
Processing
Data transfer
Application programs

Data-localization scheme using task-fusion for macro-dataflow computation

Yoshida, A., Maeda, S., Fujimoto, K. & Kasahara, H., 1995, IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE, p. 135-140 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Fusion reactions
Data storage equipment
Data transfer
Subroutines

Data localization using loop aligned decomposition for macro-dataflow processing

Yoshida, A. & Kasahara, H., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1239. p. 57-74 18 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1239).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data Flow
Macros
Decomposition
Data storage equipment
Decompose

Dynamic profiling and feedback framework for reduce-side join

Nakayama, M., Yamazaki, K., Tanaka, S. & Kasahara, H., 2013, Proceedings - 16th IEEE International Conference on Computational Science and Engineering, CSE 2013. p. 1255-1262 8 p. 6755369

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Feedback
Servers

Enhancing the performance of a multiplayer game by using a parallelizing compiler

Al-Dosary, Y. I. M., Kimura, K., Kasahara, H. & Narita, S., 2012, Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games. p. 67-75 9 p. 6314554

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hazards
Parallel programming
Computer applications
Costs
Experiments
1 Citation (Scopus)

Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K. & Kasahara, H., 2015, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 8967. p. 239-252 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8967).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power Control
Cortex
Power control
Compiler
Electric power utilization
1 Citation (Scopus)

Evaluation of power consumption at execution of multiple automatically parallelized and power controlled media applications on the RP2 low-power multicore

Mikami, H., Kitaki, S., Mase, M., Hayashi, A., Shimaoka, M., Kimura, K., Edahiro, M. & Kasahara, H., 2013, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 7146 LNCS. p. 31-45 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7146 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power Consumption
Electric power utilization
Evaluation
Encoder
Parallel Processing
1 Citation (Scopus)

Green multicore-SoC software-execution framework with timely-power-gating scheme

Onouchi, M., Toyama, K., Nojiri, T., Sato, M., Mase, M., Shirako, J., Sato, M., Takada, M., Ito, M., Mizuno, H., Namiki, M., Kimura, K. & Kasahara, H., 2009, Proceedings of the International Conference on Parallel Processing. p. 510-517 8 p. 5362472

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Software
Scalability
Cache
Power Consumption
Electric power utilization

Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications

Zhang, F., Zhai, J., Snir, M., Jin, H., Kasahara, H. & Valero, M., 2019 Jan 1, In : International Journal of Parallel Programming.

Research output: Contribution to journalEditorial

Open Access
Parallel processing systems
Parallel Computing
Architecture
15 Citations (Scopus)

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 Jan, In : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

Research output: Contribution to journalArticle

Program processors
Particle accelerators
Memory architecture
Computer programming
Embedded systems
5 Citations (Scopus)

Heterogeneous multicore processor technologies for embedded systems

Uchiyama, K., Arakawa, F., Kasahara, H., Nojiri, T., Noda, H., Tawara, Y., Idehara, A., Iwata, K. & Shikano, H., 2012 Oct 1, Springer New York. 224 p.

Research output: Book/ReportBook

Embedded systems
Program processors
Computer operating systems
Application programs
Computer hardware
7 Citations (Scopus)

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2007, IEEE Symposium on VLSI Circuits, Digest of Technical Papers. p. 18-19 2 p. 4342719

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Program processors
Memory architecture
Computer programming
Embedded systems
3 Citations (Scopus)

Hierarchical macro-dataflow computation scheme

Okamoto, M., Yamashita, K., Kasahara, H. & Narita, S., 1995, IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE, p. 44-49 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Macros
Subroutines
Data storage equipment
Computer systems
Scheduling
12 Citations (Scopus)

Hierarchical parallelism control for multigrain parallel processing

Obata, M., Shirako, J., Kaminaga, H., Ishizaka, K. & Kasahara, H., 2005, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 2481 LNCS. p. 31-44 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2481 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Parallel Processing
Parallelism
Processing
Subroutines
Servers
18 Citations (Scopus)

Humanoid robot - development of an information assistant robot Hadaly

Hashimoto, S., Narita, S., Kasahara, H., Takanishi, A., Sugano, S., Shirai, K., Kobayashi, T., Takanobu, H., Kurata, T., Fujiwara, K., Matsuno, T., Kawasaki, T. & Hoashi, K., 1997, Robot and Human Communication - Proceedings of the IEEE International Workshop. Piscataway, NJ, United States: IEEE, p. 106-111 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Robots
Experiments
33 Citations (Scopus)

Humanoid robots in Waseda University - Hadaly-2 and WABIAN

Hashimoto, S., Narita, S., Kasahara, H., Shirai, K., Kobayashi, T., Takanishi, A., Sugano, S., Yamaguchi, J., Sawada, H., Takanobu, H., Shibuya, K., Morita, T., Kurata, T., Onoe, N., Ouchi, K., Noguchi, T., Niwa, Y., Nagayama, S., Tabayashi, H., Matsui, I. & 44 others, Obata, M., Matsuzaki, H., Murasugi, A., Kobayashi, T., Haruyama, S., Okada, T., Hidaki, Y., Taguchi, Y., Hoashi, K., Morikawa, E., Iwano, Y., Araki, D., Suzuki, J., Yokoyama, M., Dawa, I., Nishino, D., Inoue, S., Hirano, T., Soga, E., Gen, S., Yanada, T., Kato, K., Sakamoto, S., Ishii, Y., Matsuo, S., Yamamoto, Y., Sato, K., Hagiwara, T., Ueda, T., Honda, N., Hashimoto, K., Hanamoto, T., Kayaba, S., Kojima, T., Iwata, H., Kubodera, H., Matsuki, R., Nakajima, T., Nitto, K., Yamamoto, D., Kamizaki, Y., Nagaike, S., Kunitake, Y. & Morita, S., 2002 Jan, In : Autonomous Robots. 12, 1, p. 25-38 14 p.

Research output: Contribution to journalArticle

Robots
Speech synthesis
Speech recognition
Robotics

IEEE Division VIII Delegate/Director Candidates

Kasahara, H., 2017 Jan 1, Computer, 50, 8, p. 94-95 2 p.

Research output: Contribution to specialist publicationArticle

Open Access

IEEE President-Elect Candidates Address Computer Society Concerns

Kasahara, H., 2017 Jan 1, Computer, 50, 8, p. 96-100 5 p.

Research output: Contribution to specialist publicationArticle

Open Access

INTEGRATED SIMULATION SYSTEM FOR DESIGN AND EVALUATION OF DISTRIBUTED COMPUTER CONTROL SYSTEMS.

Kasahara, H. & Narita, S., 1985, IFAC Proceedings Series. Oxford, Engl: r IFAC by Pergamon Press, p. 2669-2674 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Computer control systems
Distributed parameter control systems
Communication systems
Dynamical systems
Hardware
20 Citations (Scopus)

Job scheduling scheme for pure space sharing among rigid jobs

Aida, K., Kasahara, H. & Narita, S., 1998, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1459. p. 98-121 24 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1459).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Job Scheduling
Sharing
Scheduling
Evaluate
Multiprocessor Systems

Kasahara Voted 2017 Computer Society President-Elect

Kasahara, H. & Gaudiot, J. L., 2016 Dec 1, Computer, 49, 12, p. 90-92 3 p.

Research output: Contribution to specialist publicationArticle

Governors
6 Citations (Scopus)

Language extensions in support of compiler parallelization

Shirako, J., Kasahara, H. & Sarkar, V., 2008, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 5234 LNCS. p. 78-94 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5234 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Privatization
Object oriented programming
Parallelization
Compiler
Software engineering
3 Citations (Scopus)

LOAD DISTRIBUTION AMONG REAL-TIME CONTROL COMPUTERS CONNECTED VIA COMMUNICATION MEDIA.

Kasahara, H. & Narita, S., 1985, IFAC Proceedings Series. Oxford, Engl: r IFAC by Pergamon Press, p. 2695-2700 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Industrial robots
Real time control
Synchronization
Scheduling
Communication