• 946 Citations
  • 13 h-Index
1981 …2019

Research output per year

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Research Output

Article

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 Apr, In : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

Research output: Contribution to journalArticle

A data-localization compilation scheme using partial-static task assignment for Fortran coarse-grain parallel processing

Kasahara, H. & Yoshida, A., 1998 May, In : Parallel Computing. 24, 3-4, p. 579-596 18 p.

Research output: Contribution to journalArticle

10 Citations (Scopus)

Android video processing system combined with automatically parallelized and power optimized code by OSCAR compiler

Binh, B. D., Hirano, T., Mikami, H., Yamamoto, H., Kimura, K. & Kasahara, H., 2016, In : Journal of Information Processing. 24, 3, p. 504-511 8 p.

Research output: Contribution to journalArticle

APPLICATION OF DF/IHS TO MINIMUM TOTAL WEIGHTED FLOW TIME MULTIPROCESSOR SCHEDULING PROBLEMS.

Kasahara, H., Kai, M., Narita, S. & Wada, H., 1988 Jun, In : Systems and Computers in Japan. 19, 6, p. 25-34 10 p.

Research output: Contribution to journalArticle

Application of Parallel Processing to PWR Plant Predictive Simulator

Sasaki, K., Kanamaru, H., Kasahara, H. & Narita, S., 1990, In : Nippon Genshiryoku Gakkaishi/Journal of the Atomic Energy Society of Japan. 32, 10, p. 1009-1022 14 p.

Research output: Contribution to journalArticle

A standard task graph set for fair evaluation of multiprocessor scheduling algorithms

Tobita, T. & Kasahara, H., 2002 Sep, In : Journal of Scheduling. 5, 5, p. 379-394 16 p.

Research output: Contribution to journalArticle

102 Citations (Scopus)
4 Citations (Scopus)

Coarse grain parallelism detection scheme of a fortran program

Honda, H. & Kasahara, H., 1991, In : Systems and Computers in Japan. 22, 12, p. 24-36 13 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)
2 Citations (Scopus)

Data-localization scheduling inside processor-cluster for multigrain parallel processing

Yoshida, A., Koshizuka, KI., Ogata, W. & Kasahara, H., 1997, In : IEICE Transactions on Information and Systems. E80-D, 4, p. 473-478 6 p.

Research output: Contribution to journalArticle

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 Jan, In : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

Research output: Contribution to journalArticle

15 Citations (Scopus)

Humanoid robots in Waseda University - Hadaly-2 and WABIAN

Hashimoto, S., Narita, S., Kasahara, H., Shirai, K., Kobayashi, T., Takanishi, A., Sugano, S., Yamaguchi, J., Sawada, H., Takanobu, H., Shibuya, K., Morita, T., Kurata, T., Onoe, N., Ouchi, K., Noguchi, T., Niwa, Y., Nagayama, S., Tabayashi, H., Matsui, I. & 44 others, Obata, M., Matsuzaki, H., Murasugi, A., Kobayashi, T., Haruyama, S., Okada, T., Hidaki, Y., Taguchi, Y., Hoashi, K., Morikawa, E., Iwano, Y., Araki, D., Suzuki, J., Yokoyama, M., Dawa, I., Nishino, D., Inoue, S., Hirano, T., Soga, E., Gen, S., Yanada, T., Kato, K., Sakamoto, S., Ishii, Y., Matsuo, S., Yamamoto, Y., Sato, K., Hagiwara, T., Ueda, T., Honda, N., Hashimoto, K., Hanamoto, T., Kayaba, S., Kojima, T., Iwata, H., Kubodera, H., Matsuki, R., Nakajima, T., Nitto, K., Yamamoto, D., Kamizaki, Y., Nagaike, S., Kunitake, Y. & Morita, S., 2002 Jan, In : Autonomous Robots. 12, 1, p. 25-38 14 p.

Research output: Contribution to journalArticle

33 Citations (Scopus)

IEEE Division VIII Delegate/Director Candidates

Kasahara, H., 2017 Jan 1, Computer, 50, 8, p. 94-95 2 p.

Research output: Contribution to specialist publicationArticle

Open Access

IEEE President-Elect Candidates Address Computer Society Concerns

Kasahara, H., 2017 Jan 1, Computer, 50, 8, p. 96-100 5 p.

Research output: Contribution to specialist publicationArticle

Open Access

Kasahara Voted 2017 Computer Society President-Elect

Kasahara, H. & Gaudiot, J. L., 2016 Dec 1, Computer, 49, 12, p. 90-92 3 p.

Research output: Contribution to specialist publicationArticle

Multigrain parallel processing on compiler cooperative OSCAR chip multiprocessor architecture

Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 Apr, In : IEICE Transactions on Electronics. E86-C, 4, p. 570-579 10 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)

Parallel optimization algorithm for minimum execution-time multiprocessor scheduling problem

Kasahara, H., Itoh, A., Tanaka, H. & Itoh, K., 1992, In : Systems and Computers in Japan. 23, 13, p. 54-65 12 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

PARALLEL PROCESSING OF ROBOT-ARM CONTROL COMPUTATION ON A MULTIMICROPROCESSOR SYSTEM.

Kasahara, H. & Narita, S., 1985 Jun, In : IEEE journal of robotics and automation. RA-1, 2, p. 104-113 10 p.

Research output: Contribution to journalArticle

101 Citations (Scopus)
3 Citations (Scopus)

Parallel processing of robot dynamics simulation using optimal multiprocessor scheduling algorithms

Kasahara, H., Iwata, M., Narita, S. & Fujii, H., 1988 Oct, In : Systems and Computers in Japan. 19, 10, p. 45-54 10 p.

Research output: Contribution to journalArticle

Parallel processing scheme of a basic block in a Fortran program on OSCAR

Honda, H., Kasahara, H., Narita, S. & Mizuno, S., 1991, In : Systems and Computers in Japan. 22, 11, p. 1-13 13 p.

Research output: Contribution to journalArticle

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 Apr, In : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

PRACTICAL MULTIPROCESSOR SCHEDULING ALGORITHMS FOR EFFICIENT PARALLEL PROCESSING.

Kasahara, H. & Narita, S., 1984 Nov, In : IEEE Transactions on Computers. C-33, 11, p. 1023-1029 7 p.

Research output: Contribution to journalArticle

285 Citations (Scopus)

PRACTICAL MULTIPROCESSOR SCHEDULING ALGORITHMS FOR EFFICIENT PARALLEL PROCESSING.

Kasahara, H. & Narita, S., 1985 Mar, In : Systems and Computers in Japan. 16, 2, p. 11-19 9 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP

Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2003 Jun, In : International Journal of Parallel Programming. 31, 3, p. 211-223 13 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)

Task Scheduling Algorithms for Multiprocessor Realtime Control Systems.

Kai, M., Kasahara, H., Narita, S. & Ukaji, H., 1986, In : IEEJ Transactions on Electronics, Information and Systems. 106, 12, p. 257-264 8 p.

Research output: Contribution to journalArticle

TASK SCHEDULING ALGORITHMS FOR MULTIPROCESSOR REAL-TIME CONTROL SYSTEMS.

Kai, M., Kasahara, H., Narita, S. & Ukaji, H., 1987 Mar, In : Electrical Engineering in Japan (English translation of Denki Gakkai Ronbunshi). 107, 2, p. 120-130 11 p.

Research output: Contribution to journalArticle

What Will 2022 Look Like? The IEEE CS 2022 Report

Alkhatib, H., Faraboschi, P., Frachtenberg, E., Kasahara, H., Lange, D., Laplante, P., Merchant, A., Milojicic, D. & Schwan, K., 2015 Mar 1, In : Computer. 48, 3, p. 68-76 9 p., 7063168.

Research output: Contribution to journalArticle

11 Citations (Scopus)
Book

Heterogeneous multicore processor technologies for embedded systems

Uchiyama, K., Arakawa, F., Kasahara, H., Nojiri, T., Noda, H., Tawara, Y., Idehara, A., Iwata, K. & Shikano, H., 2012 Oct 1, Springer New York. 224 p.

Research output: Book/ReportBook

5 Citations (Scopus)
Chapter

Parallel processing of the solution of ordinary differential equations on a general purpose multiprocessor system OSCAR

Kasahara, H., Takane, E., Sato, H., Hisanaga, Y. & Narita, S., 1988 Sep, Bulletin of Centre for Informatics (Waseda University). Vol. 8. p. 1-8 8 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

PARALLEL PROCESSING SCHEME FOR THE CALCULATION OF OPTICAL FLOW AND THE DETERMINATION OF CAMERA MOTION PARAMETERS.

Ito, T., Nakano, K., Kasahara, H. & Narita, S., 1987 Mar, Bulletin of Centre for Informatics (Waseda University). Vol. 5. p. 47-59 13 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Conference contribution

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 4242284

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Citations (Scopus)

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 53. p. 100-101 2 p. 5434031

Research output: Chapter in Book/Report/Conference proceedingConference contribution

29 Citations (Scopus)

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 Dec 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A multi-grain parallelizing compilation scheme for OSCAR (Optimally scheduled advanced multiprocessor)

Kasahara, H., Honda, H., Mogi, A., Ogura, A., Fujiwara, K. & Narita, S., 1992 Jan 1, Languages and Compilers for Parallel Computing - 4th International Workshop, Proceedings. Springer-Verlag, p. 283-297 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 589 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008, Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 51. 4523071

Research output: Chapter in Book/Report/Conference proceedingConference contribution

32 Citations (Scopus)

An efficient OR-parallel processing scheme of Prolog: Hierarchical pincers attack search

Kai, M. & Kasahara, H., 1991 Dec 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings. Anon (ed.). Publ by IEEE, p. 677-680 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 Oct 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 6760 LNCS. p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6760 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

APPROACH TO SUPERCOMPUTING USING MULTIPROCESSOR SCHEDULING ALGORITHMS.

Kasahara, H. & Narita, S., 1985, Unknown Host Publication Title. New York, NY, USA: IEEE, p. 139-148 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 Nov 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Automatic coarse grain task parallel processing on SMP using openMP

Kasahara, H., Obata, M. & Ishizaka, K., 2001, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 2017. p. 189-207 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, Vol. 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10136 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Coarse-grain task parallel processing using the openMP backend of the OSCAR multigrain parallelizing compiler

Ishizaka, K., Obata, M. & Kasahara, H., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1940. p. 457-470 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1940).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Compilation scheme for near fine grain parallel processing on a multiprocessor system without explicit synchronization

Ogata, W., Fujimoto, K., Oota, M. & Kasahara, H., 1995, IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings. Piscataway, NJ, United States: IEEE, p. 327-332 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4339 LNCS. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4339 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)