• 967 Citations
  • 13 h-Index
1981 …2019

Research output per year

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Research Output

Review article
Paper

Compilation scheme for near fine grain parallel processing on a multiprocessor system without explicit synchronization

Ogata, W., Fujimoto, K., Oota, M. & Kasahara, H., 1995 Jan 1, p. 327-332. 6 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Data-localization for Fortran macro-dataflow computation using partial static task assignment

Yoshida, A., Koshizuka, K. & Kasahara, H., 1996 Jan 1, p. 61-68. 8 p.

Research output: Contribution to conferencePaper

9 Citations (Scopus)

Data-localization scheme using task-fusion for macro-dataflow computation

Yoshida, A., Maeda, S., Fujimoto, K. & Kasahara, H., 1995 Jan 1, p. 135-140. 6 p.

Research output: Contribution to conferencePaper

Dynamic profiling and feedback framework for reduce-side join

Nakayama, M., Yamazaki, K., Tanaka, S. & Kasahara, H., 2013 Dec 1, p. 1255-1262. 8 p.

Research output: Contribution to conferencePaper

Hierarchical macro-dataflow computation scheme

Okamoto, M., Yamashita, K., Kasahara, H. & Narita, S., 1995 Jan 1, p. 44-49. 6 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Humanoid robot - development of an information assistant robot Hadaly

Hashimoto, S., Narita, S., Kasahara, H., Takanishi, A., Sugano, S., Shirai, K., Kobayashi, T., Takanobu, H., Kurata, T., Fujiwara, K., Matsuno, T., Kawasaki, T. & Hoashi, K., 1997 Dec 1, p. 106-111. 6 p.

Research output: Contribution to conferencePaper

18 Citations (Scopus)

Memory management for data localization on OSCAR chip multiprocessor

Nakano, H., Kodaka, T., Kimura, K. & Kasahara, H., 2004 Dec 1, p. 82-88. 7 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Near fine grain parallel processing of circuit simulation using direct method

Maekawa, Y., Nakano, K., Takai, M. & Kasahara, H., 1995 Jan 1, p. 272-276. 5 p.

Research output: Contribution to conferencePaper

OSCAR multi-grain architecture and its evaluation

Kasahara, H., Ogata, W., Kimura, K., Matsui, G., Matsuzuki, H., Okamoto, M., Yoshida, A. & Honda, H., 1997 Dec 1, p. 106-115. 10 p.

Research output: Contribution to conferencePaper

6 Citations (Scopus)

Parallel processing using data localization for MPEG2 encoding on OSCAR chip multiprocessor

Kodaka, T., Nakano, H., Kimura, K. & Kasahara, H., 2004 Dec 1, p. 119-127. 9 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Performance evaluation of macrodataflow computation on shared memory multiprocessors

Aida, K., Iwasaki, K., Kasahara, H. & Narita, S., 1995 Jan 1, p. 50-54. 5 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)
Editorial

Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications

Zhang, F., Zhai, J., Snir, M., Jin, H., Kasahara, H. & Valero, M., 2019 Jan 1, In : International Journal of Parallel Programming.

Research output: Contribution to journalEditorial

Open Access

Message from the CAP 2017 Organizing Committee

Seceleanu, C., Kasahara, H. & Seceleanu, T., 2017 Sep 7, In : Proceedings - International Computer Software and Applications Conference. 1, 1 p., 8029643.

Research output: Contribution to journalEditorial

Preface

Zhang, F., Zhai, J., Snir, M., Jin, H., Kasahara, H. & Valero, M., 2018 Jan 1, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 11276 LNCS, p. V

Research output: Contribution to journalEditorial

Conference contribution

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007 Sep 27, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 100-101+590+95 4242284. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Citations (Scopus)

A 45nm 37.3GOPS/W heterogeneous multi-core SoC

Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010 May 18, 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers. p. 100-101 2 p. 5434031. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 53).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

29 Citations (Scopus)

Accelerating Multicore Architecture Simulation Using Application Profile

Kimura, K., Taguchi, G. & Kasahara, H., 2016 Dec 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A multi-grain parallelizing compilation scheme for OSCAR (Optimally scheduled advanced multiprocessor)

Kasahara, H., Honda, H., Mogi, A., Ogura, A., Fujiwara, K. & Narita, S., 1992 Jan 1, Languages and Compilers for Parallel Computing - 4th International Workshop, Proceedings. Springer-Verlag, p. 283-297 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 589 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008 Aug 21, 2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC. p. 90-91+598+81 4523071. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 51).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

34 Citations (Scopus)

An efficient OR-parallel processing scheme of Prolog: Hierarchical pincers attack search

Kai, M. & Kasahara, H., 1991 Dec 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings. Anon (ed.). Publ by IEEE, p. 677-680 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Annotatable systrace: An extended linux ftrace for tracing a parallelized program

Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 Oct 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A parallelizing compiler cooperative heterogeneous multicore processor architecture

Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011 Dec 1, Transactions on High-Performance Embedded Architectures and Compilers IV. Stenstrom, P. (ed.). p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6760 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

APPROACH TO SUPERCOMPUTING USING MULTIPROCESSOR SCHEDULING ALGORITHMS.

Kasahara, H. & Narita, S., 1985 Dec 1, Unknown Host Publication Title. IEEE, p. 139-148 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Architecture design for the environmental monitoring system over the winter season

Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 Nov 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Automatic coarse grain task parallel processing on SMP using openMP

Kasahara, H., Obata, M. & Ishizaka, K., 2001 Jan 1, Languages and Compilers for Parallel Computing - 13th International Workshop, LCPC 2000, Revised Papers. Ferrante, J., Midkiff, S. P., Moreira, J. E., Gupta, M., Chatterjee, S., Prins, J., Pugh, W. & Tseng, C-W. (eds.). Springer Verlag, p. 189-207 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Automatic local memory management for multicores having global address space

Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Springer Verlag, Vol. 10136 LNCS. p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10136 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Automatic parallelization, performance predictability and power control for mobile-applications

Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013 Aug 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Coarse-grain task parallel processing using the openMP backend of the OSCAR multigrain parallelizing compiler

Ishizaka, K., Obata, M. & Kasahara, H., 2000 Jan 1, High Performance Computing - 3rd International Symposium, ISHPC 2000, Proceedings. Tanaka, H., Valero, M., Kitsuregawa, M. & Joe, K. (eds.). Springer Verlag, p. 457-470 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1940).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Compiler control power saving scheme for multi core processors

Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006 Dec 1, Languages and Compilers for Parallel Computing - 18th International Workshop, LCPC 2005, Revised Selected Papers. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4339 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)

Data localization using loop aligned decomposition for macro-dataflow processing

Yoshida, A. & Kasahara, H., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1239. p. 57-74 18 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1239).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Enhancing the performance of a multiplayer game by using a parallelizing compiler

Al-Dosary, Y. I. M., Kimura, K., Kasahara, H. & Narita, S., 2012 Nov 19, Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games. p. 67-75 9 p. 6314554. (Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K. & Kasahara, H., 2015, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 8967. p. 239-252 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8967).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Evaluation of power consumption at execution of multiple automatically parallelized and power controlled media applications on the RP2 low-power multicore

Mikami, H., Kitaki, S., Mase, M., Hayashi, A., Shimaoka, M., Kimura, K., Edahiro, M. & Kasahara, H., 2013 Jan 28, Languages and Compilers for Parallel Computing - 24th International Workshop, LCPC 2011, Revised Selected Papers. p. 31-45 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7146 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Green multicore-SoC software-execution framework with timely-power-gating scheme

Onouchi, M., Toyama, K., Nojiri, T., Sato, M., Mase, M., Shirako, J., Sato, M., Takada, M., Ito, M., Mizuno, H., Namiki, M., Kimura, K. & Kasahara, H., 2009 Dec 1, ICPP-2009 - The 38th International Conference on Parallel Processing. p. 510-517 8 p. 5362472. (Proceedings of the International Conference on Parallel Processing).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2007 Dec 1, 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 18-19 2 p. 4342719. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Hierarchical parallelism control for multigrain parallel processing

Obata, M., Shirako, J., Kaminaga, H., Ishizaka, K. & Kasahara, H., 2005 Dec 1, Languages and Compilers for Parallel Computing - 15th Workshop, LCPC 2002, Revised Papers. p. 31-44 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2481 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

INTEGRATED SIMULATION SYSTEM FOR DESIGN AND EVALUATION OF DISTRIBUTED COMPUTER CONTROL SYSTEMS.

Kasahara, H. & Narita, S., 1985 Jan 1, IFAC Proceedings Series. r IFAC by Pergamon Press, p. 2669-2674 6 p. (IFAC Proceedings Series).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Job scheduling scheme for pure space sharing among rigid jobs

Aida, K., Kasahara, H. & Narita, S., 1998 Jan 1, Job Scheduling Strategies for Parallel Processing - IPPS/SPDP 1998 Workshop, Proceedings. Feitelson, D. G. & Rudolph, L. (eds.). Springer Verlag, p. 98-121 24 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1459).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)

Language extensions in support of compiler parallelization

Shirako, J., Kasahara, H. & Sarkar, V., 2008 Oct 27, Languages and Compilers for Parallel Computing - 20th International Workshop, LCPC 2007, Revised Selected Papers. p. 78-94 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5234 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

LOAD DISTRIBUTION AMONG REAL-TIME CONTROL COMPUTERS CONNECTED VIA COMMUNICATION MEDIA.

Kasahara, H. & Narita, S., 1985 Jan 1, IFAC Proceedings Series. r IFAC by Pergamon Press, p. 2695-2700 6 p. (IFAC Proceedings Series).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

LOAD DISTRIBUTION AMONG REAL-TIME CONTROL COMPUTERS - MULTIPROCESSOR CONTROL OF TANDEM ROLLING MILLS.

Kai, M., Wada, H., Kasahara, H., Narita, S. & Ukaji, H., 1986 Dec 1, Unknown Host Publication Title. Suski, G. J. (ed.). Pergamon Press, p. 155-163 9 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multicore Cache Coherence Control by a Parallelizing Compiler

Kasahara, H., Kimura, K., Adhi, B. A., Hosokawa, Y., Kishimoto, Y. & Mase, M., 2017 Sep 7, Proceedings - 2017 IEEE 41st Annual Computer Software and Applications Conference, COMPSAC 2017. IEEE Computer Society, Vol. 1. p. 492-497 6 p. 8029648

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Multigrain automatic parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler

Kasahara, H., Obata, M., Ishizaka, K., Kimura, K., Kaminaga, H., Nakano, H., Nagasawa, K., Murai, A., Itagaki, H. & Shirako, J., 2002 Jan 1, Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002. Institute of Electrical and Electronics Engineers Inc., p. 105-111 7 p. 1115213. (Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Multigrain parallelization for model-based design applications using the OSCAR compiler

Umeda, D., Suzuki, T., Mikami, H., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 125-139 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Multigrain parallel processing for JPEG encoding on a single chip multiprocessor

Kodaka, T., Kimura, K. & Kasahara, H., 2002, Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. IEEE Computer Society, Vol. 2002-January. p. 57-63 7 p. 1035019

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Multigrain parallel processing on OSCAR CMP

Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 Jan 1, Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2003. Veidenbaum, A. & Joe, K. (eds.). IEEE Computer Society, p. 56-65 10 p. 1262783. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Multiple-paths search with concurrent thread scheduling for fast AND/OR tree search

Takano, F., Maekawa, Y. & Kasahara, H., 2009 Oct 13, Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems, CISIS 2009. p. 51-58 8 p. 5066768. (Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems, CISIS 2009).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)