• Source: Scopus
  • Calculated based on no. of publications stored in Pure and citations from Scopus
1981 …2020

Research activity per year

If you made any changes in Pure these will be visible here soon.
Filter
Conference contribution

Search results

  • 2019

    Cascaded DMA controller for speedup of indirect memory access in irregular applications

    Kashimata, T., Kitamura, T., Kimura, K. & Kasahara, H., 2019 Nov, 2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019. Institute of Electrical and Electronics Engineers Inc., p. 71-76 6 p. 8945078. (2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Fast and Highly Optimizing Separate Compilation for Automatic Parallelization

    Kawasumi, T., Tamura, R., Asada, Y., Han, J., Mikami, H., Kimura, K. & Kasahara, H., 2019 Jul, 2019 International Conference on High Performance Computing and Simulation, HPCS 2019. Institute of Electrical and Electronics Engineers Inc., p. 478-485 8 p. 9188148. (2019 International Conference on High Performance Computing and Simulation, HPCS 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 2017

    Automatic local memory management for multicores having global address space

    Yamamoto, K., Shirakawa, T., Oki, Y., Yoshida, A., Kimura, K. & Kasahara, H., 2017, Languages and Compilers for Parallel Computing - 29th International Workshop, LCPC 2016, Revised Papers. Ding, C., Criswell, J. & Wu, P. (eds.). Springer Verlag, p. 282-296 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10136 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Multicore Cache Coherence Control by a Parallelizing Compiler

    Kasahara, H., Kimura, K., Adhi, B. A., Hosokawa, Y., Kishimoto, Y. & Mase, M., 2017 Sep 7, Proceedings - 2017 IEEE 41st Annual Computer Software and Applications Conference, COMPSAC 2017. Demartini, C., Conte, T., Nakamura, M., Lung, C-H., Zhang, Z., Hasan, K., Reisman, S., Liu, L., Claycomb, W., Takakura, H., Yang, J-J., Tovar, E., Cimato, S., Ahamed, S. I. & Akiyama, T. (eds.). IEEE Computer Society, p. 492-497 6 p. 8029648. (Proceedings - International Computer Software and Applications Conference; vol. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • 2016

    Accelerating Multicore Architecture Simulation Using Application Profile

    Kimura, K., Taguchi, G. & Kasahara, H., 2016 Dec 5, Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016. Institute of Electrical and Electronics Engineers Inc., p. 177-184 8 p. 7774436

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Architecture design for the environmental monitoring system over the winter season

    Yamashita, K., Ao, C., Suzuki, T., Xu, Y., Li, H., Tian, J., Kimura, K. & Kasahara, H., 2016 Nov 13, MobiWac 2016 - Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, co-located with MSWiM 2016. Association for Computing Machinery, Inc, p. 27-34 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Coarse grain task parallelization of earthquake simulator GMS using OSCAR compiler on various Cc-NUMA servers

    Shimaoka, M., Wada, Y., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 238-253 16 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Multigrain parallelization for model-based design applications using the OSCAR compiler

    Umeda, D., Suzuki, T., Mikami, H., Kimura, K. & Kasahara, H., 2016, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 9519. p. 125-139 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9519).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • Reducing parallelizing compilation time by removing redundant analysis

    Han, J., Fujino, R., Tamura, R., Shimaoka, M., Mikami, H., Takamura, M., Kamiya, S., Suzuki, K., Miyajima, T., Kimura, K. & Kasahara, H., 2016 Oct 21, SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016. Jannesari, A., Sato, Y. & Winter, S. (eds.). Association for Computing Machinery, Inc, p. 1-9 9 p. (SEPS 2016 - Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, co-located with SPLASH 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • 2015

    Annotatable systrace: An extended linux ftrace for tracing a parallelized program

    Fukui, D., Shimaoka, M., Mikami, H., Hillenbrand, D., Yamamoto, H., Kimura, K. & Kasahara, H., 2015 Oct 27, SEPS 2015 - Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems. Association for Computing Machinery, Inc, p. 21-25 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Evaluation of automatic power reduction with OSCAR compiler on Intel Haswell and ARM Cortex-A9 multicores

    Hirano, T., Yamamoto, H., Iizuka, S., Muto, K., Goto, T., Wake, T., Mikami, H., Takamura, M., Kimura, K. & Kasahara, H., 2015, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 8967. p. 239-252 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8967).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Parallelization of tree-to-TLV serialization

    Nakayama, M., Yamazaki, K., Tanaka, S. & Kasahara, H., 2015 Jan 20, 2014 IEEE 33rd International Performance Computing and Communications Conference, IPCCC 2014. Institute of Electrical and Electronics Engineers Inc., Vol. 2014-January. 7017059

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • 2014

    OSCAR compiler controlled multicore power reduction on android platform

    Yamamoto, H., Hirano, T., Muto, K., Mikami, H., Goto, T., Hillenbrand, D., Takamura, M., Kimura, K. & Kasahara, H., 2014 Jan 1, Languages and Compilers for Parallel Computing - 26th International Workshop, LCPC 2013, Revised Selected Papers. Caşcaval, C. & Montesinos, P. (eds.). Springer Verlag, p. 155-168 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8664).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • 2013

    Automatic parallelization, performance predictability and power control for mobile-applications

    Hillenbrand, D., Hayashi, A., Yamamoto, H., Kimura, K. & Kasahara, H., 2013 Aug 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547919. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Evaluation of power consumption at execution of multiple automatically parallelized and power controlled media applications on the RP2 low-power multicore

    Mikami, H., Kitaki, S., Mase, M., Hayashi, A., Shimaoka, M., Kimura, K., Edahiro, M. & Kasahara, H., 2013, Languages and Compilers for Parallel Computing - 24th International Workshop, LCPC 2011, Revised Selected Papers. p. 31-45 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7146 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler

    Kanehagi, Y., Umeda, D., Hayashi, A., Kimura, K. & Kasahara, H., 2013 Aug 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547921. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)
  • Reconciling application power control and operating systems for optimal power and performance

    Hillenbrand, D., Furuyama, Y., Hayashi, A., Mikami, H., Kimura, K. & Kasahara, H., 2013 Sep 16, 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013. 6581539. (2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • 2012

    Enhancing the performance of a multiplayer game by using a parallelizing compiler

    Al-Dosary, Y. I. M., Kimura, K., Kasahara, H. & Narita, S., 2012 Nov 19, Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games. p. 67-75 9 p. 6314554. (Proceedings of CGAMES'2012 USA - 17th International Conference on Computer Games: AI, Animation, Mobile, Interactive Multimedia, Educational and Serious Games).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 2011

    A parallelizing compiler cooperative heterogeneous multicore processor architecture

    Wada, Y., Hayashi, A., Masuura, T., Shirako, J., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2011, Transactions on High-Performance Embedded Architectures and Compilers IV. Springer Verlag, p. 215-233 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6760 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Parallelizing compiler framework and API for power reduction and software productivity of real-time heterogeneous multicores

    Hayashi, A., Wada, Y., Watanabe, T., Sekiguchi, T., Mase, M., Shirako, J., Kimura, K. & Kasahara, H., 2011 Mar 18, Languages and Compilers for Parallel Computing - 23rd International Workshop, LCPC 2010, Revised Selected Papers. p. 184-198 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6548 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    9 Citations (Scopus)
  • 2010

    A 45nm 37.3GOPS/W heterogeneous multi-core SoC

    Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010 May 18, 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers. p. 100-101 2 p. 5434031. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 53).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    29 Citations (Scopus)
  • OSCAR API for real-time low-power multicores and its performance on multicores and SMP servers

    Kimura, K., Mase, M., Mikami, H., Miyamoto, T., Shirako, J. & Kasahara, H., 2010 Jul 14, Languages and Compilers for Parallel Computing - 22nd International Workshop, LCPC 2009, Revised Selected Papers. p. 188-202 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5898 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    21 Citations (Scopus)
  • 2009

    Green multicore-SoC software-execution framework with timely-power-gating scheme

    Onouchi, M., Toyama, K., Nojiri, T., Sato, M., Mase, M., Shirako, J., Sato, M., Takada, M., Ito, M., Mizuno, H., Namiki, M., Kimura, K. & Kasahara, H., 2009, ICPP-2009 - The 38th International Conference on Parallel Processing. p. 510-517 8 p. 5362472. (Proceedings of the International Conference on Parallel Processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Multiple-paths search with concurrent thread scheduling for fast AND/OR tree search

    Takano, F., Maekawa, Y. & Kasahara, H., 2009 Oct 13, Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems, CISIS 2009. p. 51-58 8 p. 5066768. (Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems, CISIS 2009).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Parallel and concurrent search for fast AND/OR tree search on multicore processors

    Takano, F., Maekawa, Y. & Kasahara, H., 2009 Dec 1, Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2009. p. 139-144 6 p. (Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2009).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • 2008

    An 8640 MIPS SoC with independent power-off control of 8 CPUs and 8 RAMs by an automatic parallelizing compiler

    Ito, M., Hattori, T., Yoshida, Y., Hayase, K., Hayashi, T., Nishii, O., Yasu, Y., Hasegawa, A., Takada, M., Ito, M., Mizuno, H., Uchiyama, K., Odaka, T., Shirako, J., Mase, M., Kimura, K. & Kasahara, H., 2008, 2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC. Institute of Electrical and Electronics Engineers Inc., p. 89-91 3 p. 4523071. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 51).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    34 Citations (Scopus)
  • Language extensions in support of compiler parallelization

    Shirako, J., Kasahara, H. & Sarkar, V., 2008 Oct 27, Languages and Compilers for Parallel Computing - 20th International Workshop, LCPC 2007, Revised Selected Papers. p. 78-94 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5234 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • Parallelization with automatic parallelizing compiler generating consumer electronics multicore API

    Miyamoto, T., Asaka, S., Mikami, H., Mase, M., Wada, Y., Nakano, H., Kimura, K. & Kasahara, H., 2008 Dec 1, Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008. p. 600-607 8 p. 4725200. (Proceedings of the 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • Performance evaluation of compiler controlled power saving scheme

    Shirako, J., Yoshida, M., Oshiyama, N., Wada, Y., Nakano, H., Shikano, H., Kimura, K. & Kasahara, H., 2008 Feb 1, High-Performance Computing - 6th International Symposium, ISHPC 2005 and First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers. p. 480-493 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4759 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Power Reduction Controll for Multicores in OSCAR Multigrain Parallelizing Compiler

    Shirako, J., Kimura, K. & Kasahara, H., 2008, 2008 International SoC Design Conference, ISOCC 2008. IEEE Computer Society, p. 50-55 6 p. 4815571. (s2008 International SoC Design Conference, ISOCC 2008; vol. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Software-cooperative power-efficient heterogeneous multi-core for media processing

    Shikano, H., Ito, M., Uchiyama, K., Odaka, T., Hayashi, A., Masuura, T., Mase, M., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 Aug 21, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC. p. 736-741 6 p. 4484049. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • 2007

    A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

    Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007 Sep 27, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 100-101+590+95 4242284. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    24 Citations (Scopus)
  • Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

    Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2007 Dec 1, 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 18-19 2 p. 4342719. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • Power-aware compiler controllable chip multiprocessor

    Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2007 Dec 1, 16th International Conference on Parallel Architecture and Compilation Techniques, PACT 2007. 1 p. 4336255. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • 2006

    Compiler control power saving scheme for multi core processors

    Shirako, J., Oshiyama, N., Wada, Y., Shikano, H., Kimura, K. & Kasahara, H., 2006 Dec 1, Languages and Compilers for Parallel Computing - 18th International Workshop, LCPC 2005, Revised Selected Papers. p. 362-376 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4339 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    16 Citations (Scopus)
  • 2005

    Hierarchical parallelism control for multigrain parallel processing

    Obata, M., Shirako, J., Kaminaga, H., Ishizaka, K. & Kasahara, H., 2005 Dec 1, Languages and Compilers for Parallel Computing - 15th Workshop, LCPC 2002, Revised Papers. p. 31-44 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2481 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    12 Citations (Scopus)
  • 2003

    Multigrain parallel processing on OSCAR CMP

    Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 Jan 1, Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2003. Veidenbaum, A. & Joe, K. (eds.). IEEE Computer Society, p. 56-65 10 p. 1262783. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • 2002

    Multigrain automatic parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler

    Kasahara, H., Obata, M., Ishizaka, K., Kimura, K., Kaminaga, H., Nakano, H., Nagasawa, K., Murai, A., Itagaki, H. & Shirako, J., 2002 Jan 1, Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002. Institute of Electrical and Electronics Engineers Inc., p. 105-111 7 p. 1115213. (Proceedings - International Conference on Parallel Computing in Electrical Engineering, PARELEC 2002).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    8 Citations (Scopus)
  • Multigrain parallel processing for JPEG encoding on a single chip multiprocessor

    Kodaka, T., Kimura, K. & Kasahara, H., 2002, International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2002. Joe, K. & Veidenbaum, A. (eds.). IEEE Computer Society, p. 57-63 7 p. 1035019. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2002-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    11 Citations (Scopus)
  • Static coarse grain task scheduling with cache optimization using openMP

    Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2002 Dec 1, High Performance Computing - 4th International Symposium, ISHPC 2002, Proceedings. p. 479-489 11 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2327 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • 2001

    Automatic coarse grain task parallel processing on SMP using openMP

    Kasahara, H., Obata, M. & Ishizaka, K., 2001 Jan 1, Languages and Compilers for Parallel Computing - 13th International Workshop, LCPC 2000, Revised Papers. Ferrante, J., Midkiff, S. P., Moreira, J. E., Gupta, M., Chatterjee, S., Prins, J., Pugh, W. & Tseng, C-W. (eds.). Springer Verlag, p. 189-207 19 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    10 Citations (Scopus)
  • 2000

    Coarse-grain task parallel processing using the openMP backend of the OSCAR multigrain parallelizing compiler

    Ishizaka, K., Obata, M. & Kasahara, H., 2000 Jan 1, High Performance Computing - 3rd International Symposium, ISHPC 2000, Proceedings. Tanaka, H., Valero, M., Kitsuregawa, M. & Joe, K. (eds.). Springer Verlag, p. 457-470 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1940).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)
  • 1999

    Near fine grain parallel processing using static scheduling on single chip multiprocessors

    Kimura, K. & Kasahara, H., 1999, Innovative Architecture for Future Generation High-Performance Processors and Systems - 1999 International Workshop on Innovative Architectures, IWIA 1999. Nakashima, H. & Veidenbaum, A. (eds.). IEEE Computer Society, p. 23-31 9 p. 898840. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 1999-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • 1998

    Job scheduling scheme for pure space sharing among rigid jobs

    Aida, K., Kasahara, H. & Narita, S., 1998 Jan 1, Job Scheduling Strategies for Parallel Processing - IPPS/SPDP 1998 Workshop, Proceedings. Feitelson, D. G. & Rudolph, L. (eds.). Springer Verlag, p. 98-121 24 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1459).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    20 Citations (Scopus)
  • 1997

    Data localization using loop aligned decomposition for macro-dataflow processing

    Yoshida, A. & Kasahara, H., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1239. p. 57-74 18 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1239).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 1992

    A multi-grain parallelizing compilation scheme for OSCAR (Optimally scheduled advanced multiprocessor)

    Kasahara, H., Honda, H., Mogi, A., Ogura, A., Fujiwara, K. & Narita, S., 1992, Languages and Compilers for Parallel Computing - 4th International Workshop, Proceedings. Banerjee, U., Gelernter, D., Nicolau, A. & Padua, D. (eds.). Springer Verlag, p. 283-297 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 589 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    8 Citations (Scopus)
  • 1991

    An efficient OR-parallel processing scheme of Prolog: Hierarchical pincers attack search

    Kai, M. & Kasahara, H., 1991 Dec 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings. Anon (ed.). Publ by IEEE, p. 677-680 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. Conference Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Parallel processing scheme for a Fortran program on a multiprocessor system OSCAR

    Honda, H., Mogi, A., Ogura, A., Kasahara, H. & Narita, S., 1991 Dec 1, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings. Anon (ed.). Publ by IEEE, p. 9-12 4 p. (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 1990

    Parallel processing of near fine grain tasks using static scheduling on OSCAR (Optimally Scheduled Advanced Multiprocessor)

    Kasahara, H., Honda, H. & Narita, S., 1990 Dec 1, Proc Supercomput 90. Publ by IEEE, p. 856-864 9 p. (Proc Supercomput 90).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    19 Citations (Scopus)
  • 1986

    LOAD DISTRIBUTION AMONG REAL-TIME CONTROL COMPUTERS - MULTIPROCESSOR CONTROL OF TANDEM ROLLING MILLS.

    Kai, M., Wada, H., Kasahara, H., Narita, S. & Ukaji, H., 1986 Dec 1, Unknown Host Publication Title. Suski, G. J. (ed.). Pergamon Press, p. 155-163 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution