Kazushi Kawamura

講師(任期付)

  • 15 Citations
  • 2 h-Index
20132019

Research output per year

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Research Output

  • 15 Citations
  • 2 h-Index
  • 9 Conference contribution
  • 5 Article

An FPGA implementation method based on distributed-register architectures

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2019 Feb 1, In : IPSJ Transactions on System LSI Design Methodology. 12, p. 38-41 4 p.

Research output: Contribution to journalArticle

Open Access
  • A loop structure optimization targeting high-level synthesis of fast number theoretic transform

    Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 May 9, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, Vol. 2018-March. p. 106-111 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 1 Citation (Scopus)

    A selector-based FFT processor and its FPGA implementation

    Hirai, Y., Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 May 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 88-89 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Rotator-based multiplexer network synthesis for field-data extractors

    Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2017 Apr 19, Proceedings - 29th IEEE International System on Chip Conference, SOCC 2016. IEEE Computer Society, p. 194-199 6 p. 7905464

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 1 Citation (Scopus)