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Research Output 1997 2017

  • 245 Citations
  • 9 h-Index
  • 41 Conference contribution
  • 9 Article
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Article
2016

Android video processing system combined with automatically parallelized and power optimized code by OSCAR compiler

Binh, B. D., Hirano, T., Mikami, H., Yamamoto, H., Kimura, K. & Kasahara, H., 2016, In : Journal of Information Processing. 24, 3, p. 504-511 8 p.

Research output: Contribution to journalArticle

Processing
Electric power utilization
Demonstrations
Optical flows
Power control
2011

A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 Apr, In : IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

Research output: Contribution to journalArticle

Physical addresses
Engines
Data storage equipment
Data transfer
Processing
2009

Foreword: Special section on hardware and software technologies on advanced microprocessors

Inoue, K., Kai, K., Arakawa, F., Inoue, A., Hirose, Y., Kyo, S., Kimura, K., Kuga, M., Kondo, M., Sato, T., Satoh, M., Tomiyama, H., Nakamura, H., Hayashi, H., Hariyama, M., Matsutani, H. & Uchiyama, K., 2009, In : IEICE Transactions on Electronics. E92-C, 10, p. 1231 1 p.

Research output: Contribution to journalArticle

Microprocessor chips
Hardware
2008
15 Citations (Scopus)

Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding

Shikano, H., Ito, M., Onouchi, M., Todaka, T., Tsunoda, T., Kodama, T., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K. & Kasahara, H., 2008 Jan, In : IEEE Journal of Solid-State Circuits. 43, 4, p. 902-908 7 p.

Research output: Contribution to journalArticle

Program processors
Particle accelerators
Memory architecture
Computer programming
Embedded systems
1 Citation (Scopus)

Power-aware compiler controllable chip multiprocessor

Shikano, H., Shirako, J., Wada, Y., Kimura, K. & Kasahara, H., 2008 Apr, In : IEICE Transactions on Electronics. E91-C, 4, p. 432-439 8 p.

Research output: Contribution to journalArticle

Power control
Program processors
Electric power utilization
Particle accelerators
Clocks
2003
3 Citations (Scopus)

Multigrain parallel processing on compiler cooperative OSCAR chip multiprocessor architecture

Kimura, K., Kodaka, T., Obata, M. & Kasahara, H., 2003 Apr, In : IEICE Transactions on Electronics. E86-C, 4, p. 570-579 10 p.

Research output: Contribution to journalArticle

Data transfer
Processing
Data storage equipment
Lapping
Synchronization
2 Citations (Scopus)

Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP

Nakano, H., Ishizaka, K., Obata, M., Kimura, K. & Kasahara, H., 2003 Jun, In : International Journal of Parallel Programming. 31, 3, p. 211-223 13 p.

Research output: Contribution to journalArticle

OpenMP
Task Scheduling
Parallelizing Compilers
Cache
Scheduling