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Research Output 1998 2019

  • 778 Citations
  • 14 h-Index
  • 126 Conference contribution
  • 97 Article
  • 4 Chapter
  • 1 Letter
2019

A multiple cyclic-route generation method with route length constraint considering point-of-interests

Nishimura, T., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2019 Apr 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E102A, 4, p. 641-653 13 p.

Research output: Contribution to journalArticle

Reference Point
User Preferences
Search Methods

An FPGA implementation method based on distributed-register architectures

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2019 Feb 1, In : IPSJ Transactions on System LSI Design Methodology. 12, p. 38-41 4 p.

Research output: Contribution to journalArticle

Open Access
Field programmable gate arrays (FPGA)
Networks (circuits)

Efficient Ising Model Mapping to Solving Slot Placement Problem

Kanamaru, S., Oku, D., Tawada, M., Tanaka, S., Hayashi, M., Yamaoka, M., Yanagisawa, M. & Togawa, N., 2019 Mar 6, 2019 IEEE International Conference on Consumer Electronics, ICCE 2019. Institute of Electrical and Electronics Engineers Inc., 8661947. (2019 IEEE International Conference on Consumer Electronics, ICCE 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ising model
Combinatorial optimization
Hamiltonians
Electric wiring
Simulated annealing

Landmark Seasonal Travel Distribution and Activity Prediction Based on Language-specific Analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2019 Jan 22, Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018. Song, Y., Liu, B., Lee, K., Abe, N., Pu, C., Qiao, M., Ahmed, N., Kossmann, D., Saltz, J., Tang, J., He, J., Liu, H. & Hu, X. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 3628-3637 10 p. 8622103. (Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Recommender systems
Electromyography
Fingers
Hand
Logistic Models
Regression Analysis

Personalized Landmark Recommendation for Language-Specific Users by Open Data Mining

Bao, S., Yanagisawa, M. & Togawa, N., 2019 Jan 1, Studies in Computational Intelligence. Springer-Verlag, p. 107-121 15 p. (Studies in Computational Intelligence; vol. 791).

Research output: Chapter in Book/Report/Conference proceedingChapter

Data mining
Websites

Static error analysis and optimization of faithfully truncated adders for area-power efficient FIR designs

Ye, J., Togawa, N., Yanagisawa, M. & Shi, Y., 2019 Jan 1, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702386. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Adders
Error analysis
FIR filters
Costs
2018

2n RRR: Improved stochastic number duplicator based on bit re-arrangement

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 Dec 10, 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., p. 182-185 4 p. 8572289

Research output: Chapter in Book/Report/Conference proceedingConference contribution

flip-flops
Networks (circuits)
Flip flop circuits
output
Hyperbolic functions

A hardware-Trojan classification method utilizing boundary net structures

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 Mar 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1-4 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Learning systems
Hardware security

A loop structure optimization targeting high-level synthesis of fast number theoretic transform

Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 May 9, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. IEEE Computer Society, Vol. 2018-March. p. 106-111 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Cryptography
Program processors
Hardware
High level synthesis
2 Citations (Scopus)

A low cost and high speed CSD-based symmetric transpose block FIR implementation

Ye, J., Shi, Y., Togawa, N. & Yanagisawa, M., 2018 Jan 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, Vol. 2017-October. p. 311-314 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Costs
Reusability
Digital signal processing
Energy utilization
Processing
Soft Error
Trigger
Power Consumption
Electric power utilization
Double Sampling
1 Citation (Scopus)

A multiple cyclic-route generation method for strolling based on point-of-interests

Nishimura, T., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 Dec 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, Vol. 2018-September. 8576185

Research output: Chapter in Book/Report/Conference proceedingConference contribution

An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 Sep 26, 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018. Maniatakos, M., Alexandrescu, D., Gizopoulos, D. & Papavramidou, P. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 53-56 4 p. 8474263

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Composite materials
Mean square error
Artificial intelligence
Image processing

An Ising model mapping to solve rectangle packing problem

Terada, K., Oku, D., Kanamaru, S., Tanaka, S., Hayashi, M., Yamaoka, M., Yanagisawa, M. & Togawa, N., 2018 Jun 5, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ising model
Packing Problem
Rectangle
Ising Model
Annealing
Error-correcting Codes
Data storage equipment
Systematic Error
Crosstalk
Error Correction

A selector-based FFT processor and its FPGA implementation

Hirai, Y., Kawamura, K., Yanagisawa, M. & Togawa, N., 2018 May 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 88-89 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fast Fourier transforms
Field programmable gate arrays (FPGA)
Signal processing
Processing
1 Citation (Scopus)
Location Estimation
Positioning
Global positioning system
Mobile devices
Mobile Devices

A Trojan-invalidating Circuit Based on Signal Transitions and Its FPGA Implementation

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 Apr 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-May. 8351058

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Networks (circuits)
Hardware
Reconfigurable hardware

Bicycle behavior recognition using sensors equipped with smartphone

Usami, Y., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 Dec 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, Vol. 2018-September. 8576254

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bicycles
Smartphones
Sensors
Learning systems
Accidents
1 Citation (Scopus)

Designing hardware trojans and their detection based on a SVM-based approach

Inoue, T., Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 Jan 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, Vol. 2017-October. p. 811-814 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Support vector machines
Hardware
Learning systems
Classifiers
Transceivers

Designing subspecies of hardware trojans and their detection using neural network approach

Inoue, T., Hasegawa, K., Kobayashi, Y., Yanagisawa, M. & Togawa, N., 2018 Dec 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, Vol. 2018-September. 8576247

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Neural networks
Hardware
Trigger circuits
Domestic appliances
Learning systems

Detecting the Existence of Malfunctions in Microcontrollers Utilizing Power Analysis

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2018 Sep 26, 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018. Maniatakos, M., Alexandrescu, D., Gizopoulos, D. & Papavramidou, P. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 97-102 6 p. 8474113

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Microcontrollers
Television
Electric power utilization
Hardware
Internet of things
Multilayer Neural Network
Multilayer neural networks
Hardware
Optimization
Evaluation
Approximate Design
Adders
Gears
Formulation
Energy Consumption

Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systems

Asai, D., Yanagisawa, M. & Togawa, N., 2018 Jan 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, Vol. 2017-October. p. 64-67 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy harvesting
Networks (circuits)
High level synthesis
Energy utilization
Scheduling

Gesture recognition of air-tapping and its application to character input in VR space

Hirota, M., Yokoyama, M., Tsuboi, A. & Yanagisawa, M., 2018 Dec 4, SIGGRAPH Asia 2018 Posters, SA 2018. Association for Computing Machinery, Inc, 3283335

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electromyography
Gesture recognition
Muscle
Air
Controllers
Hardware
Logic
Testing
Transition State
Integrated Circuits

Road-illuminance level inference across road networks based on Bayesian analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2018 Mar 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Learning systems

Robust AES circuit design for delay variation using suspicious timing error prediction

Yahagi, Y., Yanagisawa, M. & Togawa, N., 2018 May 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 101-102 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Cryptography
Networks (circuits)
Timing circuits

Robust indoor/outdoor detection method based on sparse GPS positioning information

Iwata, S., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 Dec 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, Vol. 2018-September. 8576188

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Global positioning system
Classifiers
Learning systems
Experiments
Networks (circuits)
Side channel attack
Processing

Soft error tolerant latch designs with low power consumption (invited paper)

Tajima, S., Togawa, N., Yanagisawa, M. & Shi, Y., 2018 Jan 8, Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017. IEEE Computer Society, Vol. 2017-October. p. 52-55 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric power utilization
Semiconductor materials
Radiation
Electric potential
3 Citations (Scopus)
Rearrangement
Networks (circuits)
Logic circuits
Mean square error
Inaccurate
2017

A 28-GHz band highly linear power amplifier with novel adaptive bias circuit for cascode MOSFET in 56-nm SOI CMOS

Sato, H., Yanagisawa, M. & Yoshimasu, T., 2017 Dec 1, EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-2 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Power amplifiers
Networks (circuits)
Communication
High-level Synthesis
Controller
Controllers
Unit
Hardware Design
High-level Synthesis
Bias voltage
Leakage
Data flow graphs
Energy
7 Citations (Scopus)
Learning systems
Machine Learning
Hardware
Support vector machines
Neural networks
5 Citations (Scopus)

An accurate indoor positioning algorithm using particle filter based on the proximity of bluetooth beacons

Momose, R., Nitta, T., Yanagisawa, M. & Togawa, N., 2017 Dec 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-5 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

beacons
Bluetooth
positioning
proximity
filters
1 Citation (Scopus)

An Evaluation of Hand-Force Prediction Using Artificial Neural-Network Regression Models of Surface EMG Signals for Handwear Devices

Yokoyama, M., Koyama, R. & Yanagisawa, M., 2017 Jan 1, In : Journal of Sensors. 2017, 3980906.

Research output: Contribution to journalArticle

Electromyography
regression analysis
Neural networks
evaluation
Dynamometers
2 Citations (Scopus)

A Proposal for Wearable Controller Device and Finger Gesture Recognition using Surface Electromyography

Tsuboi, A., Hirota, M., Sato, J., Yokoyama, M. & Yanagisawa, M., 2017 Nov 27, SIGGRAPH Asia 2017 Posters, SA 2017. Association for Computing Machinery, Inc, 9

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electromyography
Gesture recognition
Muscle
Controllers
Discriminant analysis
1 Citation (Scopus)

A robust scan-based side-channel attack method against HMAC-SHA-256 circuits

Oku, D., Yanagisawa, M. & Togawa, N., 2017 Dec 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, Vol. 2017-September. p. 79-84 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Side channel attack
Processing
1 Citation (Scopus)
Landmarks
Lighting
Count
Safety
Algorithm Design
1 Citation (Scopus)

A stayed location estimation method for sparse GPS positioning information

Iwata, S., Nitta, T., Takayama, T., Yanagisawa, M. & Togawa, N., 2017 Dec 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-5 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

positioning
Global positioning system
Mobile devices
electric batteries
intervals

Effective write-reduction method for MLC non-volatile memory

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2017 Sep 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050699

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Durability
Embedded systems
Extractor
Wire
Evaluation
Networks (circuits)
Partitioning
1 Citation (Scopus)

Hardware Trojan detection and classification based on steady state learning

Oya, M., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 215-220 6 p. 8046225

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testing
Networks (circuits)
Hardware security
15 Citations (Scopus)

Hardware Trojans classification for gate-level netlists using multi-layer neural networks

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 227-232 6 p. 8046227

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multilayer neural networks
Hardware
Outsourcing
Learning systems
Integrated circuit design

Implementation evaluation of scan-based attack against a Trivium cipher circuit

Oku, D., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 220-223 4 p. 7803938

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Networks (circuits)
Processing
2 Citations (Scopus)

Indoor navigation based on real-Time direction information generation using wearable glasses

Iwanaji, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 7804754

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Navigation systems
navigation
Navigation
Glass
landmarks