• 906 Citations
  • 15 h-Index
19982020

Research output per year

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Research Output

Hardware Trojan detection and classification based on steady state learning

Oya, M., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 215-220 6 p. 8046225

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Hardware Trojans classification for gate-level netlists based on machine learning

Hasegawa, K., Oya, M., Yanagisawa, M. & Togawa, N., 2016 Oct 20, 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. Institute of Electrical and Electronics Engineers Inc., p. 203-206 4 p. 7604700

Research output: Chapter in Book/Report/Conference proceedingConference contribution

29 Citations (Scopus)

Hardware Trojans classification for gate-level netlists using multi-layer neural networks

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 227-232 6 p. 8046227

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Citations (Scopus)

Hardware-trojans rank: Quantitative evaluation of security threats at gate-level netlists by pattern matching

Oya, M., Yamashita, N., Okamura, T., Tsunoo, Y., Yanagisawa, M. & Togawa, N., 2016 Dec 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E99A, 12, p. 2335-2347 13 p.

Research output: Contribution to journalArticle

6 Citations (Scopus)
4 Citations (Scopus)

High-level power optimization based on thread partitioning

Uchida, J., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2004 Dec, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E87-A, 12, p. 3075-3082 8 p.

Research output: Contribution to journalArticle

High-level synthesis algorithms with floorplaning for distributed/shared- register architectures

Ohchi, A., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2008 Sep 5, 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT. p. 164-167 4 p. 4542438. (2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

High-level synthesis system for digital signal processing based on enumerating data-flow graphs

Togawa, N., Hisaki, T., Yanagisawa, M. & Ohtsuki, T., 1998 Dec 1, p. 265-274. 10 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

High-level synthesis with post-silicon delay tuning for RDR architectures

Hagio, Y., Yanagisawa, M. & Togawa, N., 2013 Jan 1, ISOCC 2013 - 2013 International SoC Design Conference. IEEE Computer Society, p. 194-197 4 p. 6863970. (ISOCC 2013 - 2013 International SoC Design Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation

Igarashi, K., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7517027

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Implementation evaluation of scan-based attack against a Trivium cipher circuit

Oku, D., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 220-223 4 p. 7803938

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Improved launch for higher TDF coverage with fewer test patterns

Shi, Y., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2010 Aug 1, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29, 8, p. 1294-1299 6 p., 5512687.

Research output: Contribution to journalArticle

Improved monitoring-path selection algorithm for suspicious timing error prediction based timing speculation

Yoshida, S., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516962

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Incremental placement and global routing algorithm for field-programmable gate arrays

Togawa, N., Hagi, K., Yanagisawa, M. & Ohtsuki, T., 1998 Dec 1, p. 519-526. 8 p.

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Indoor navigation based on real-Time direction information generation using wearable glasses

Iwanaji, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 7804754

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

In-situ Trojan authentication for invalidating hardware-Trojan functions

Oya, M., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 May 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, Vol. 2016-May. p. 152-157 6 p. 7479192

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Instruction set and functional unit synthesis for SIMD processor cores

Togawa, N., Tachikake, K., Miyaoka, Y., Yanagisawa, M. & Ohtsuki, T., 2004 Jun 1, p. 743-750. 8 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Integrating wearable sensor technology into project-management process

Ara, K., Akitomi, T., Sato, N., Takahashi, K., Maeda, H., Yano, K. & Yanagisawa, M., 2012 Dec 21, In : Journal of information processing. 20, 2, p. 406-418 13 p.

Research output: Contribution to journalArticle

5 Citations (Scopus)

Landmark Seasonal Travel Distribution and Activity Prediction Based on Language-specific Analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2019 Jan 22, Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018. Song, Y., Liu, B., Lee, K., Abe, N., Pu, C., Qiao, M., Ahmed, N., Kossmann, D., Saltz, J., Tang, J., He, J., Liu, H. & Hu, X. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 3628-3637 10 p. 8622103. (Proceedings - 2018 IEEE International Conference on Big Data, Big Data 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Linear and bi-linear interpolation circuits using selector logics and their evaluations

Shio, M., Yanagisawa, M. & Togawa, N., 2014 Jan 1, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., p. 1436-1439 4 p. 6865415. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Localization of sperm whales in a group using clicks received at two separated short baseline arrays

Hirotsu, R., Yanagisawa, M., Ura, T., Sakata, M., Sugimatsu, H., Kojima, J. & Bahl, R., 2010 Feb 10, In : Journal of the Acoustical Society of America. 127, 1, p. 133-147 15 p.

Research output: Contribution to journalArticle

18 Citations (Scopus)
1 Citation (Scopus)

Low altitude tracking of rugged seafloors for autonomous visual observation

Maki, T., Ura, T., Mizushima, H., Kondo, H., Sakamaki, T. & Yanagisawa, M., 2007 Oct 1, International Symposium on Underwater Technology, UT 2007 - International Workshop on Scientific Use of Submarine Cables and Related Technologies 2007. p. 488-494 7 p. 4231101. (International Symposium on Underwater Technology, UT 2007 - International Workshop on Scientific Use of Submarine Cables and Related Technologies 2007).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Low-cost IP core test using multiple-mode loading scan chain and scan chain clusters

Zeng, G., Shi, Y., Takabatake, T., Yanagisawa, M. & Ito, H., 2006 Dec 1, Proceedings - 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT'06. p. 136-144 9 p. 4030924. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Low power test compression technique for designs with multiple scan chains

Shi, Y., Togawa, N., Kimura, S., Yanagisawa, M. & Ohtsuki, T., 2005 Dec 1, Proceedings - 14th Asian Test Symposium, ATS 2005. p. 386-389 4 p. 1575460. (Proceedings of the Asian Test Symposium; vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)
7 Citations (Scopus)
14 Citations (Scopus)

Muscle analysis of hand and forearm during tapping using surface electromyography

Yokoyama, M., Koyama, R. & Yanagisawa, M., 2016 Feb 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 595-598 4 p. 7398505

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

New correction algorithms for multiple comparisons in case-control multilocus association studies based on haplotypes and diplotype configurations

Misawa, K., Fujii, S., Yamazaki, T., Takahashi, A., Takasaki, J., Yanagisawa, M., Ohnishi, Y., Nakamura, Y. & Kamatani, N., 2008 Sep 1, In : Journal of Human Genetics. 53, 9, p. 789-801 13 p.

Research output: Contribution to journalArticle

6 Citations (Scopus)

Partitioning-based multiplexer network synthesis for field-data extractors

Ito, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2016 Feb 12, Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015. Buchner, T., Zhao, D., Bhatia, K. & Sridhar, R. (eds.). IEEE Computer Society, p. 263-268 6 p. 7406960. (International System on Chip Conference; vol. 2016-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Pedestrian navigation based on landmark recognition using glass-type wearable devices

Yano, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 Dec 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800433

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Performance-driven high-level synthesis with floorplan for GDR architectures and its evaluation

Ohchi, A., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2010 Aug 31, ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. p. 921-924 4 p. 5537401. (ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Personalized landmark recommendation algorithm based on language-specific satisfaction prediction using heterogeneous open data sources

Bao, S., Yanagisawa, M. & Togawa, N., 2018 Aug, Proceedings - 2018 10th International Conference on Computational Intelligence and Communication Networks, CICN 2018. Akbar Hussain, D. M., Tomar, G. S. & Tomar, G. S. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 70-76 7 p. 8864958. (Proceedings - 2018 10th International Conference on Computational Intelligence and Communication Networks, CICN 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Personalized Landmark Recommendation for Language-Specific Users by Open Data Mining

Bao, S., Yanagisawa, M. & Togawa, N., 2019 Jan 1, Studies in Computational Intelligence. Springer-Verlag, p. 107-121 15 p. (Studies in Computational Intelligence; vol. 791).

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Citation (Scopus)

Personalized one-day travel with multi-nearby-landmark recommendation

Bao, S., Yanagisawa, M. & Togawa, N., 2017 Dec 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, Vol. 2017-September. p. 239-242 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Real time path-planning of an AUV based on characteristics of passive acoustic landmarks for visual mapping of shallow vent fields

Maki, T., Mizushima, H., Kondo, H., Ura, T., Sakamaki, T. & Yanagisawa, M., 2007 Dec 1, Oceans 2007 MTS/IEEE Conference. 4449321. (Oceans Conference Record (IEEE)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)

Redesign for untrusted gate-level netlists

Oya, M., Yanagisawa, M. & Togawa, N., 2016 Oct 20, 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. Institute of Electrical and Electronics Engineers Inc., p. 219-220 2 p. 7604706

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reducing test data volume for multiscan-based designs through single/sequence mixed encoding

Shi, Y., Kimura, S., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2004 Dec 1, In : Midwest Symposium on Circuits and Systems. 2, p. II445-II448

Research output: Contribution to journalConference article

1 Citation (Scopus)

Road-illuminance level inference across road networks based on Bayesian analysis

Bao, S., Yanagisawa, M. & Togawa, N., 2018 Mar 26, 2018 IEEE International Conference on Consumer Electronics, ICCE 2018. Institute of Electrical and Electronics Engineers Inc., Vol. 2018-January. p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Robust AES circuit design for delay variation using suspicious timing error prediction

Yahagi, Y., Yanagisawa, M. & Togawa, N., 2018 May 29, Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., p. 101-102 2 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Robust indoor/outdoor detection method based on sparse GPS positioning information

Iwata, S., Ishikawa, K., Takayama, T., Yanagisawa, M. & Togawa, N., 2018 Dec 13, 2018 IEEE 8th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2018. IEEE Computer Society, Vol. 2018-September. 8576188

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Robust secure scan design against scan-based differential cryptanalysis

Shi, Y., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2012 Jan 1, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20, 1, p. 176-181 6 p., 5734887.

Research output: Contribution to journalArticle

19 Citations (Scopus)

Rotator-based multiplexer network synthesis for field-data extractors

Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2016 Jul 2, Proceedings - 29th IEEE International System on Chip Conference, SOCC 2016. Bhatia, K., Alioto, M., Zhao, D., Marshall, A. & Sridhar, R. (eds.). IEEE Computer Society, p. 194-199 6 p. 7905464. (International System on Chip Conference; vol. 0).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Scalable and small-sized power analyzer design with signal-averaging noise reduction for low-power IoT devices

Kitayama, R., Takenaka, T., Yanagisawa, M. & Togawa, N., 2016 Jul 29, ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-July. p. 978-981 4 p. 7527406

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Scalable unified dual-radix architecture for Montgomery multiplication in GF{P) and GF(2n)

Tanimura, K., Nara, R., Kohara, S., Shimizu, K., Shi, Y., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2008 Aug 21, 2008 Asia and South Pacific Design Automation Conference, ASP-DAC. p. 697-702 6 p. 4484041. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Scan-based attack against DES and Triple DES cryptosystems using scan signatures

Kodera, H., Yanagisawa, M. & Togawa, N., 2013 Jul 19, In : Journal of information processing. 21, 3, p. 572-579 8 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)

Scan-based attack against des cryptosystems using scan signatures

Kodera, H., Yanagisawa, M. & Togawa, N., 2012 Dec 1, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. p. 599-602 4 p. 6419106. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Scan-based attack against elliptic curve cryptosystems

Nara, R., Togawa, N., Yanagisawa, M. & Ohtsuki, T., 2010 Apr 28, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 407-412 6 p. 5419848. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

46 Citations (Scopus)

Scan-based attack against Trivium stream cipher independent of scan structure

Fujishiro, M., Yanagisawa, M. & Togawa, N., 2013 Jan 1, 2013 IEEE 10th International Conference on ASIC, ASICON 2013. IEEE Computer Society, 6811855. (Proceedings of International Conference on ASIC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)