• 932 Citations
  • 16 h-Index
19982020

Research output per year

If you made any changes in Pure these will be visible here soon.

Research Output

2017
11 Citations (Scopus)

An accurate indoor positioning algorithm using particle filter based on the proximity of bluetooth beacons

Momose, R., Nitta, T., Yanagisawa, M. & Togawa, N., 2017 Dec 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-5 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

An Evaluation of Hand-Force Prediction Using Artificial Neural-Network Regression Models of Surface EMG Signals for Handwear Devices

Yokoyama, M., Koyama, R. & Yanagisawa, M., 2017 Jan 1, In : Journal of Sensors. 2017, 3980906.

Research output: Contribution to journalArticle

6 Citations (Scopus)

A Proposal for Wearable Controller Device and Finger Gesture Recognition using Surface Electromyography

Tsuboi, A., Hirota, M., Sato, J., Yokoyama, M. & Yanagisawa, M., 2017 Nov 27, SIGGRAPH Asia 2017 Posters, SA 2017. Association for Computing Machinery, Inc, 9

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

A robust scan-based side-channel attack method against HMAC-SHA-256 circuits

Oku, D., Yanagisawa, M. & Togawa, N., 2017 Dec 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, Vol. 2017-September. p. 79-84 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
1 Citation (Scopus)

A stayed location estimation method for sparse GPS positioning information

Iwata, S., Nitta, T., Takayama, T., Yanagisawa, M. & Togawa, N., 2017 Dec 19, 2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-January. p. 1-5 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Effective write-reduction method for MLC non-volatile memory

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2017 Sep 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050699

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Efficient multiplexer networks for field-data extractors and their evaluations

Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2017 Apr 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E100A, 4, p. 1015-1028 14 p.

Research output: Contribution to journalArticle

Hardware Trojan detection and classification based on steady state learning

Oya, M., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 215-220 6 p. 8046225

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Hardware Trojans classification for gate-level netlists using multi-layer neural networks

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 Sep 19, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. Institute of Electrical and Electronics Engineers Inc., p. 227-232 6 p. 8046227

Research output: Chapter in Book/Report/Conference proceedingConference contribution

26 Citations (Scopus)

Implementation evaluation of scan-based attack against a Trivium cipher circuit

Oku, D., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., p. 220-223 4 p. 7803938

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Indoor navigation based on real-Time direction information generation using wearable glasses

Iwanaji, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2017 Jan 3, 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 7804754

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Personalized one-day travel with multi-nearby-landmark recommendation

Bao, S., Yanagisawa, M. & Togawa, N., 2017 Dec 14, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2017. IEEE Computer Society, Vol. 2017-September. p. 239-242 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Trojan-feature extraction at gate-level netlists and its application to hardware-Trojan detection using random forest classifier

Hasegawa, K., Yanagisawa, M. & Togawa, N., 2017 Sep 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050827

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Citations (Scopus)
3 Citations (Scopus)
2016
1 Citation (Scopus)

A delay variation and floorplan aware high-level synthesis algorithm with body biasing

Igawa, K., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 May 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, Vol. 2016-May. p. 75-80 6 p. 7479179

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A high-level synthesis algorithm for FPGA designs optimizing critical path with interconnection-delay and clock-skew consideration

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 May 31, 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc., 7482547

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A highly-adaptable and small-sized in-field power analyzer for low-power IoT devices

Kitayama, R., Takenaka, T., Yanagisawa, M. & Togawa, N., 2016 Dec 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E99A, 12, p. 2348-2362 15 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

A high-performance circuit design algorithm using data dependent approximation

Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 Dec 27, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., p. 95-96 2 p. 7799750

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A landmark-based route recommendation method for pedestrian walking strategies

Bao, S., Nitta, T., Shindou, D., Yanagisawa, M. & Togawa, N., 2016 Feb 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 672-673 2 p. 7398511

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A low-power soft error tolerant latch scheme

Tajima, S., Shi, Y., Togawa, N. & Yanagisawa, M., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516885

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architectures

Igawa, K., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 Feb 12, Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015. Buchner, T., Zhao, D., Bhatia, K. & Sridhar, R. (eds.). IEEE Computer Society, p. 7-12 6 p. 7406898. (International System on Chip Conference; vol. 2016-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

A safe and comprehensive route finding method for pedestrian based on lighting and landmark

Bao, S., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 Dec 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800525

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A visible corner-landmark based route finding algorithm for pedestrian navigation

Takeda, K., Nitta, T., Shindou, D., Yanagisawa, M. & Togawa, N., 2016 Feb 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 601-602 2 p. 7398498

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Bi-partitioning based multiplexer network for field-data extractors

Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2016 Jul 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E99A, 7, p. 1410-1414 5 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

Bit-write-reducing and error-correcting code generation by clustering error-correcting codewords for non-volatile memories

Kojo, T., Tawada, M., Yanagisawa, M. & Togawa, N., 2016 Jan 5, 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015. Institute of Electrical and Electronics Engineers Inc., p. 682-689 8 p. 7372636

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Clock skew estimate modeling for FPGA high-level synthesis and its application

Fujiwara, K., Kawamura, K., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516905

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Comprehensive deformed map generation for wristwatch-type wearable devices based on landmark-based partitioning

Kono, K., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 Dec 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800432

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Hardware Trojans classification for gate-level netlists based on machine learning

Hasegawa, K., Oya, M., Yanagisawa, M. & Togawa, N., 2016 Oct 20, 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. Institute of Electrical and Electronics Engineers Inc., p. 203-206 4 p. 7604700

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Citations (Scopus)
7 Citations (Scopus)

Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation

Igarashi, K., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7517027

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Improved monitoring-path selection algorithm for suspicious timing error prediction based timing speculation

Yoshida, S., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516962

Research output: Chapter in Book/Report/Conference proceedingConference contribution

In-situ Trojan authentication for invalidating hardware-Trojan functions

Oya, M., Shi, Y., Yanagisawa, M. & Togawa, N., 2016 May 25, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. IEEE Computer Society, Vol. 2016-May. p. 152-157 6 p. 7479192

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Muscle analysis of hand and forearm during tapping using surface electromyography

Yokoyama, M., Koyama, R. & Yanagisawa, M., 2016 Feb 3, 2015 IEEE 4th Global Conference on Consumer Electronics, GCCE 2015. Institute of Electrical and Electronics Engineers Inc., p. 595-598 4 p. 7398505

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Partitioning-based multiplexer network synthesis for field-data extractors

Ito, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2016 Feb 12, Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015. Buchner, T., Zhao, D., Bhatia, K. & Sridhar, R. (eds.). IEEE Computer Society, p. 263-268 6 p. 7406960. (International System on Chip Conference; vol. 2016-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Pedestrian navigation based on landmark recognition using glass-type wearable devices

Yano, R., Nitta, T., Ishikawa, K., Yanagisawa, M. & Togawa, N., 2016 Dec 27, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 7800433

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Redesign for untrusted gate-level netlists

Oya, M., Yanagisawa, M. & Togawa, N., 2016 Oct 20, 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. Institute of Electrical and Electronics Engineers Inc., p. 219-220 2 p. 7604706

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rotator-based multiplexer network synthesis for field-data extractors

Ito, K., Kawamura, K., Tamiya, Y., Yanagisawa, M. & Togawa, N., 2016 Jul 2, Proceedings - 29th IEEE International System on Chip Conference, SOCC 2016. Bhatia, K., Alioto, M., Zhao, D., Marshall, A. & Sridhar, R. (eds.). IEEE Computer Society, p. 194-199 6 p. 7905464. (International System on Chip Conference; vol. 0).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Scalable and small-sized power analyzer design with signal-averaging noise reduction for low-power IoT devices

Kitayama, R., Takenaka, T., Yanagisawa, M. & Togawa, N., 2016 Jul 29, ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-July. p. 978-981 4 p. 7527406

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Small-sized and noise-reducing power analyzer design for low-power IoT devices

Kitayama, R., Takenaka, T., Yanagisawa, M. & Togawa, N., 2016 Jul 19, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc., 7516927

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
2015

A bit-write reduction method based on error-correcting codes for non-volatile memories

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2015 Mar 11, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 496-501 6 p. 7059055

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designs

Fujiwara, K., Abe, S., Kawamura, K., Yanagisawa, M. & Togawa, N., 2015 Feb 5, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February ed. Institute of Electrical and Electronics Engineers Inc., p. 244-247 4 p. 7032765. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; vol. 2015-February, no. February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A floorplan-driven high-level synthesis algorithm for multiplexer reduction targeting FPGA designs

Fujiwara, K., Kawamura, K., Abe, S. Y., Yanagisawa, M. & Togawa, N., 2015 Jul 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E98A, 7, p. 1392-1405 14 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)

A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration

Terada, K., Yanagisawa, M. & Togawa, N., 2015 Jul 27, Proceedings - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-July. p. 2129-2132 4 p. 7169100

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration

Teradat, K., Yanagisawa, M. & Togawa, N., 2015 Feb 5, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February ed. Institute of Electrical and Electronics Engineers Inc., p. 248-251 4 p. 7032766. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; vol. 2015-February, no. February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A hardware-trojans identifying method based on trojan net scoring at gate-level netlists

Oya, M., Shi, Y., Yamashita, N., Okamura, T., Tsunoo, Y., Goto, S., Yanagisawa, M. & Togawa, N., 2015 Dec 1, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E98A, 12, p. 2537-2546 10 p.

Research output: Contribution to journalArticle

5 Citations (Scopus)
1 Citation (Scopus)