Masashi Tawada

講師(任期付)

  • 26 Citations
  • 3 h-Index
20112019
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Research Output 2011 2019

  • 26 Citations
  • 3 h-Index
  • 10 Conference contribution
  • 8 Article
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Conference contribution
2019

Efficient Ising Model Mapping to Solving Slot Placement Problem

Kanamaru, S., Oku, D., Tawada, M., Tanaka, S., Hayashi, M., Yamaoka, M., Yanagisawa, M. & Togawa, N., 2019 Mar 6, 2019 IEEE International Conference on Consumer Electronics, ICCE 2019. Institute of Electrical and Electronics Engineers Inc., 8661947. (2019 IEEE International Conference on Consumer Electronics, ICCE 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ising model
Combinatorial optimization
Hamiltonians
Electric wiring
Simulated annealing
2018

2n RRR: Improved stochastic number duplicator based on bit re-arrangement

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 Dec 10, 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., p. 182-185 4 p. 8572289

Research output: Chapter in Book/Report/Conference proceedingConference contribution

flip-flops
Networks (circuits)
Flip flop circuits
output
Hyperbolic functions

An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic Circuits

Ishikawa, R., Tawada, M., Yanagisawa, M. & Togawa, N., 2018 Sep 26, 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018. Maniatakos, M., Alexandrescu, D., Gizopoulos, D. & Papavramidou, P. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 53-56 4 p. 8474263

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Composite materials
Mean square error
Artificial intelligence
Image processing
2017

Effective write-reduction method for MLC non-volatile memory

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2017 Sep 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050699

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Durability
Embedded systems
2016
2 Citations (Scopus)

Bit-write-reducing and error-correcting code generation by clustering error-correcting codewords for non-volatile memories

Kojo, T., Tawada, M., Yanagisawa, M. & Togawa, N., 2016 Jan 5, 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015. Institute of Electrical and Electronics Engineers Inc., p. 682-689 8 p. 7372636

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Code generation
Crosstalk
Energy utilization
Radiation
2015
5 Citations (Scopus)

A bit-write reduction method based on error-correcting codes for non-volatile memories

Tawada, M., Kimura, S., Yanagisawa, M. & Togawa, N., 2015 Mar 11, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 496-501 6 p. 7059055

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error-correcting Codes
Reduction Method
Data storage equipment
Cell
Energy
3 Citations (Scopus)

A write-reducing and error-correcting code generation method for non-volatile memories

Kojo, T., Tawada, M., Yanagisawa, M. & Togawa, N., 2015 Feb 5, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. February ed. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-February. p. 304-307 4 p. 7032780

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Data storage equipment
Hamming distance
Crosstalk
Radiation
Code generation

Fast source optimization by clustering algorithm based on lithography properties

Tawada, M., Hashimoto, T., Sakanushi, K., Nojima, S., Kotani, T., Yanagisawa, M. & Togawa, N., 2015, Proceedings of SPIE - The International Society for Optical Engineering. SPIE, Vol. 9427. 94270K

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Photoresists
Lithography
Clustering algorithms
Clustering Algorithm
Photoresist
2013
1 Citation (Scopus)

Energy evaluation for two-level on-chip cache with non-volatile memory on mobile processors

Matsuno, S., Tawada, M., Yanagisawa, M., Kimura, S., Togawa, N. & Sugibayashi, T., 2013, Proceedings of International Conference on ASIC. IEEE Computer Society, 6811826

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Static random access storage
Energy utilization
Data storage equipment
Memory architecture
2011
4 Citations (Scopus)

Exact and fast L1 cache configuration simulation for embedded systems with FIFO/PLRU cache replacement policies

Tawada, M., Yanagisawa, M., Ohtsuki, T. & Togawa, N., 2011, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011. p. 247-250 4 p. 5783622

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Simulators
Hardware
Costs
Experiments