Masashi Tawada

講師(任期付)

  • 26 Citations
  • 3 h-Index
20112019
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Research Output 2011 2019

  • 26 Citations
  • 3 h-Index
  • 11 Conference contribution
  • 8 Article
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Article
2018
Error-correcting Codes
Data storage equipment
Systematic Error
Crosstalk
Error Correction
3 Citations (Scopus)
Rearrangement
Networks (circuits)
Logic circuits
Mean square error
Inaccurate
2016
1 Citation (Scopus)
Code Generation
Error-correcting Codes
Clustering
Data storage equipment
One to many
2015
2 Citations (Scopus)
Hamming distance
Code Generation
Hamming Distance
Minimum Distance
Limiting
2 Citations (Scopus)
Code Generation
Data storage equipment
Error-correcting Codes
Energy
Static random access storage
2013
Cache
Data structures
Simulator
High Speed
Simulators
2011
Embedded systems
Simulators
Hardware
Costs
3 Citations (Scopus)

Speeding-up exact and fast FIFO-based cache configuration simulation

Tawada, M., Yanagisawa, M. & Togawa, N., 2011, In : IEICE Electronics Express. 8, 14, p. 1161-1167 7 p.

Research output: Contribution to journalArticle

configurations
Embedded systems
simulation
Simulators
central processing units