0.1-μm gate-length superconducting FET

T. Nishino; M. Hatano; H. Hasegawa; F. Murai; T. Kure; A. Hiraiwa; K. Yagi; Ushio Kawabe

0.1-μm gate-length superconducting FET

T. Nishino^*, M. Hatano, H. Hasegawa, F. Murai, T. Kure, A. Hiraiwa, K. Yagi, Ushio Kawabe

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

47 Citations (Scopus)

Abstract

A superconducting field-effect transistor (FET) with a 0.1-μm-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.

Original language	English
Pages (from-to)	61-63
Number of pages	3
Journal	Electron device letters
Volume	10
Issue number	2
Publication status	Published - 1989 Feb
Externally published	Yes

ASJC Scopus subject areas

Engineering(all)

Cite this

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title = "0.1-μm gate-length superconducting FET",

abstract = "A superconducting field-effect transistor (FET) with a 0.1-μm-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.",

author = "T. Nishino and M. Hatano and H. Hasegawa and F. Murai and T. Kure and A. Hiraiwa and K. Yagi and Ushio Kawabe",

year = "1989",

month = feb,

language = "English",

volume = "10",

pages = "61--63",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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TY - JOUR

T1 - 0.1-μm gate-length superconducting FET

AU - Nishino, T.

AU - Hatano, M.

AU - Hasegawa, H.

AU - Murai, F.

AU - Kure, T.

AU - Hiraiwa, A.

AU - Yagi, K.

AU - Kawabe, Ushio

PY - 1989/2

Y1 - 1989/2

N2 - A superconducting field-effect transistor (FET) with a 0.1-μm-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.

AB - A superconducting field-effect transistor (FET) with a 0.1-μm-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.

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UR - http://www.scopus.com/inward/citedby.url?scp=0024611087&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0024611087

SN - 0741-3106

VL - 10

SP - 61

EP - 63

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 2

ER -

0.1-μm gate-length superconducting FET

Abstract

ASJC Scopus subject areas

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