10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology

Motohiro Tomita, S. Oba, Y. Himeda, R. Yamato, K. Shima, T. Kumada, M. Xu, H. Takezawa, K. Mesaki, K. Tsuda, S. Hashimoto, Tianzhuo Zhan, H. Zhang, Y. Kamakura, Y. Suzuki, H. Inokawa, H. Ikeda, T. Matsukawa, T. Matsuki, Takanobu Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A best benchmark of Si-nanowire (NW) thermoelectric (TE) power generator has been achieved by our proposed planar device architecture compatible with CMOS process technology. The TE power density corresponds to 12 μW/cm2, which is recorded at an externally applied temperature difference of only 5 K. The demonstration opens up a pathway to cost effective autonomous internet of things (IoT) application utilizing environmental and body heats.

Original languageEnglish
Title of host publication2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages93-94
Number of pages2
Volume2018-June
ISBN (Electronic)9781538642160
DOIs
Publication statusPublished - 2018 Oct 25
Event38th IEEE Symposium on VLSI Technology, VLSI Technology 2018 - Honolulu, United States
Duration: 2018 Jun 182018 Jun 22

Other

Other38th IEEE Symposium on VLSI Technology, VLSI Technology 2018
CountryUnited States
CityHonolulu
Period18/6/1818/6/22

Fingerprint

Harvesters
Thermoelectric power
Nanowires
Demonstrations
Costs
Temperature
Internet of things
Hot Temperature

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Tomita, M., Oba, S., Himeda, Y., Yamato, R., Shima, K., Kumada, T., ... Watanabe, T. (2018). 10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology. In 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018 (Vol. 2018-June, pp. 93-94). [8510659] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2018.8510659

10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology. / Tomita, Motohiro; Oba, S.; Himeda, Y.; Yamato, R.; Shima, K.; Kumada, T.; Xu, M.; Takezawa, H.; Mesaki, K.; Tsuda, K.; Hashimoto, S.; Zhan, Tianzhuo; Zhang, H.; Kamakura, Y.; Suzuki, Y.; Inokawa, H.; Ikeda, H.; Matsukawa, T.; Matsuki, T.; Watanabe, Takanobu.

2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018. Vol. 2018-June Institute of Electrical and Electronics Engineers Inc., 2018. p. 93-94 8510659.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tomita, M, Oba, S, Himeda, Y, Yamato, R, Shima, K, Kumada, T, Xu, M, Takezawa, H, Mesaki, K, Tsuda, K, Hashimoto, S, Zhan, T, Zhang, H, Kamakura, Y, Suzuki, Y, Inokawa, H, Ikeda, H, Matsukawa, T, Matsuki, T & Watanabe, T 2018, 10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology. in 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018. vol. 2018-June, 8510659, Institute of Electrical and Electronics Engineers Inc., pp. 93-94, 38th IEEE Symposium on VLSI Technology, VLSI Technology 2018, Honolulu, United States, 18/6/18. https://doi.org/10.1109/VLSIT.2018.8510659
Tomita M, Oba S, Himeda Y, Yamato R, Shima K, Kumada T et al. 10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology. In 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018. Vol. 2018-June. Institute of Electrical and Electronics Engineers Inc. 2018. p. 93-94. 8510659 https://doi.org/10.1109/VLSIT.2018.8510659
Tomita, Motohiro ; Oba, S. ; Himeda, Y. ; Yamato, R. ; Shima, K. ; Kumada, T. ; Xu, M. ; Takezawa, H. ; Mesaki, K. ; Tsuda, K. ; Hashimoto, S. ; Zhan, Tianzhuo ; Zhang, H. ; Kamakura, Y. ; Suzuki, Y. ; Inokawa, H. ; Ikeda, H. ; Matsukawa, T. ; Matsuki, T. ; Watanabe, Takanobu. / 10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology. 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018. Vol. 2018-June Institute of Electrical and Electronics Engineers Inc., 2018. pp. 93-94
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