10-Gb/s external modulation in optical CPFSK format

Takahide Sakamoto; Tetsuya Kawanishi; Tetsuya Miyazaki; Masayuki Izutsu

doi:10.1109/LPT.2006.873561

10-Gb/s external modulation in optical CPFSK format

Takahide Sakamoto, Tetsuya Kawanishi, Tetsuya Miyazaki, Masayuki Izutsu

School of Fundamental Science and Engineering

Research output: Contribution to journal › Article

3 Citations (Scopus)

Abstract

We demonstrated a synchronous control technique for external optical modulation in a format of continuous-phase frequency-shift keying (CPFSK) at 10 Gb/s. In this method, the FSK signal in the upper- or lower-sideband state synchronously shifts to the other state at the timing when their phases are the same. We investigated the accuracy of the timing control required for the synchronous control. Experimental results show that the allowable timing misalignment to keep power penalty of the receiver sensitivity less than 1 dB was more than 25 ps, 25% of each bit period.

Original language	English
Pages (from-to)	968-970
Number of pages	3
Journal	IEEE Photonics Technology Letters
Volume	18
Issue number	8
DOIs	https://doi.org/10.1109/LPT.2006.873561
Publication status	Published - 2006 Apr 15

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Keywords

Continous-phase modulation
Demodulation
Electrooptic modulation
Frequency modulation
Optical fiber communication
Optical modulation

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Electrical and Electronic Engineering

Cite this

Sakamoto, T., Kawanishi, T., Miyazaki, T., & Izutsu, M. (2006). 10-Gb/s external modulation in optical CPFSK format. IEEE Photonics Technology Letters, 18(8), 968-970. https://doi.org/10.1109/LPT.2006.873561

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abstract = "We demonstrated a synchronous control technique for external optical modulation in a format of continuous-phase frequency-shift keying (CPFSK) at 10 Gb/s. In this method, the FSK signal in the upper- or lower-sideband state synchronously shifts to the other state at the timing when their phases are the same. We investigated the accuracy of the timing control required for the synchronous control. Experimental results show that the allowable timing misalignment to keep power penalty of the receiver sensitivity less than 1 dB was more than 25 ps, 25% of each bit period.",

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10.1109/LPT.2006.873561