12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 voltage domains

Atsushi Muramatsu, Tadashi Yasufuku, Masahiro Nomura, Makoto Takamiya, Hirofumi Shinohara, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations within a functional block are compensated by the fine-grained supply voltage (VDD) control to minimize power at fixed clock frequency. In the 40-nm test chips, the layout of a data encryption core is divided into 6x7 voltage domains. Both high VDD (VDDH) and low VDD (VDDL) are supplied to each power domain and either VDDH or VDDL is adaptively selected according to the setup error warning signals generated by canary flip-flops. Compared with the conventional single VDD operation, the proposed FADVC reduced the power by 12% at 1-MHz clock in the measurement.

Original languageEnglish
Title of host publicationESSCIRC 2011 - Proceedings of the 37th European Solid-State Circuits Conference
Pages191-194
Number of pages4
DOIs
Publication statusPublished - 2011 Dec 12
Event37th European Solid-State Circuits Conference, ESSCIRC 2011 - Helsinki, Finland
Duration: 2011 Sep 122011 Sep 16

Publication series

NameEuropean Solid-State Circuits Conference
ISSN (Print)1930-8833

Other

Other37th European Solid-State Circuits Conference, ESSCIRC 2011
CountryFinland
CityHelsinki
Period11/9/1211/9/16

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ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Muramatsu, A., Yasufuku, T., Nomura, M., Takamiya, M., Shinohara, H., & Sakurai, T. (2011). 12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 voltage domains. In ESSCIRC 2011 - Proceedings of the 37th European Solid-State Circuits Conference (pp. 191-194). [6044897] (European Solid-State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2011.6044897