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120-ns 128K × 8-bit/64K × 16-bit CMOS EEPROMs
Yasushi Terada*, Kazuo Kobayashi, Takeshi Nakayama, Masanori Hayashikoshi, Yoshikazu Miyawaki, Natsuo Ajika, Hideaki Arima, Takayuki Matsukawa, Tsutomu Yoshihara
*Corresponding author for this work
Research output: Contribution to journal › Article › peer-review
5
Citations
(Scopus)