135 GHz 98 mW 10 Gbps ASK transmitter and receiver chipset in 40 nm CMOS

Naoko Ono, Mizuki Motoyoshi, Kyoya Takano, Kosuke Katayama, Ryuichi Fujimoto, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Citations (Scopus)

Abstract

An ASK transmitter and receiver chipset using 40 nm CMOS technology for wireless communication systems is described, in which a maximum data rate of 10 Gbps and power consumption of 98.4 mW are obtained with a carrier frequency of 135 GHz. A simple circuit and a modulation method to reduce power consumption are selected for the chipsets. To realize multi-gigabit wireless communication, the receiver is designed with consideration of the group delay optimization.

Original languageEnglish
Title of host publication2012 Symposium on VLSI Circuits, VLSIC 2012
Pages50-51
Number of pages2
DOIs
Publication statusPublished - 2012 Sep 28
Externally publishedYes
Event2012 Symposium on VLSI Circuits, VLSIC 2012 - Honolulu, HI, United States
Duration: 2012 Jun 132012 Jun 15

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other2012 Symposium on VLSI Circuits, VLSIC 2012
CountryUnited States
CityHonolulu, HI
Period12/6/1312/6/15

Keywords

  • ASK
  • CMOS
  • D-band
  • millimeter-wave

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • Cite this

    Ono, N., Motoyoshi, M., Takano, K., Katayama, K., Fujimoto, R., & Fujishima, M. (2012). 135 GHz 98 mW 10 Gbps ASK transmitter and receiver chipset in 40 nm CMOS. In 2012 Symposium on VLSI Circuits, VLSIC 2012 (pp. 50-51). [6243784] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). https://doi.org/10.1109/VLSIC.2012.6243784