Abstract
This paper presents a novel 18-GHz band 0.5 V Class-C pMOSFET LC-VCO IC. The LC-VCO IC consists of an oscillator core circuit with a cross-coupled pMOSFETs and an LC bias circuit, an amplitude feedback circuit for realizing Class-C operation and buffer amplifiers. The VCO IC starts to oscillate in Class AB mode and enters Class C mode in the steady-state by changing the gate bias voltage. Since the LC bias circuit increases the current amplitude of the VCO and Class-C operation prevents the pMOSFETs from entering into the deep-triode region, the novel VCO circuit topology is effective in improving the phase noise. The low-power LC biased VCO IC is designed, fabricated and fully evaluated on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase noise of -117.6 dBc/Hz at 5 MHz offset from the 18.88 GHz carrier frequency with a supply voltage of only 0.5-V. The power consumption of VCO core is 2.56 mW and that of the feedback loop is only 0.046 mW.
Original language | English |
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Title of host publication | 2017 Asia Pacific Microwave Conference, APMC 2017 - Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 938-941 |
Number of pages | 4 |
Volume | Part F134147 |
ISBN (Electronic) | 9781538606407 |
DOIs | |
Publication status | Published - 2018 Jan 8 |
Event | 2017 IEEE Asia Pacific Microwave Conference, APMC 2017 - Kuala Lumpur, Malaysia Duration: 2017 Nov 13 → 2017 Nov 16 |
Other
Other | 2017 IEEE Asia Pacific Microwave Conference, APMC 2017 |
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Country | Malaysia |
City | Kuala Lumpur |
Period | 17/11/13 → 17/11/16 |
Keywords
- 56-nm SOI CMOS
- Feedback Loop
- LC bias circuit
- LC-VCO IC
- Low-power
ASJC Scopus subject areas
- Electrical and Electronic Engineering