TY - GEN
T1 - 18-GHz band low-power LC VCO IC using LC bias circuit in 56-nm SOI CMOS
AU - Xu, Xiao
AU - Chen, Cuilin
AU - Sugiura, Tsuyoshi
AU - Yoshimasu, Toshihiko
N1 - Publisher Copyright:
© 2017 IEEE.
Copyright:
Copyright 2019 Elsevier B.V., All rights reserved.
PY - 2017/6/28
Y1 - 2017/6/28
N2 - This paper presents a novel 18-GHz band 0.5 V Class-C pMOSFET LC-VCO IC. The LC-VCO IC consists of an oscillator core circuit with a cross-coupled pMOSFETs and an LC bias circuit, an amplitude feedback circuit for realizing Class-C operation and buffer amplifiers. The VCO IC starts to oscillate in Class AB mode and enters Class C mode in the steady-state by changing the gate bias voltage. Since the LC bias circuit increases the current amplitude of the VCO and Class-C operation prevents the pMOSFETs from entering into the deep-triode region, the novel VCO circuit topology is effective in improving the phase noise. The low-power LC biased VCO IC is designed, fabricated and fully evaluated on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase noise of -117.6 dBc/Hz at 5 MHz offset from the 18.88 GHz carrier frequency with a supply voltage of only 0.5-V. The power consumption of VCO core is 2.56 mW and that of the feedback loop is only 0.046 mW.
AB - This paper presents a novel 18-GHz band 0.5 V Class-C pMOSFET LC-VCO IC. The LC-VCO IC consists of an oscillator core circuit with a cross-coupled pMOSFETs and an LC bias circuit, an amplitude feedback circuit for realizing Class-C operation and buffer amplifiers. The VCO IC starts to oscillate in Class AB mode and enters Class C mode in the steady-state by changing the gate bias voltage. Since the LC bias circuit increases the current amplitude of the VCO and Class-C operation prevents the pMOSFETs from entering into the deep-triode region, the novel VCO circuit topology is effective in improving the phase noise. The low-power LC biased VCO IC is designed, fabricated and fully evaluated on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase noise of -117.6 dBc/Hz at 5 MHz offset from the 18.88 GHz carrier frequency with a supply voltage of only 0.5-V. The power consumption of VCO core is 2.56 mW and that of the feedback loop is only 0.046 mW.
KW - 56-nm SOI CMOS
KW - Feedback Loop
KW - LC bias circuit
KW - LC-VCO IC
KW - Low-power
UR - http://www.scopus.com/inward/record.url?scp=85044777763&partnerID=8YFLogxK
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U2 - 10.1109/APMC.2017.8251604
DO - 10.1109/APMC.2017.8251604
M3 - Conference contribution
AN - SCOPUS:85044777763
T3 - Asia-Pacific Microwave Conference Proceedings, APMC
SP - 938
EP - 941
BT - 2017 Asia Pacific Microwave Conference, APMC 2017 - Proceedings
A2 - Pasya, Idnin
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 IEEE Asia Pacific Microwave Conference, APMC 2017
Y2 - 13 November 2017 through 16 November 2017
ER -