2n RRR: Improved stochastic number duplicator based on bit re-arrangement

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    In the fields of machine learning and image processing, cost-less circuits with low energy are required instead of extreme precision, and stochastic computing (SC), a type of approximate computing, is attracting attention. In SC, stochastic numbers (SNs), bit streams with values of the appearance rates of 1's, are used. SC enables calculations with simple circuits. To make the calculation results correct, duplication of an SN (gener-ating an SN with the same value) is required when using the SN with the same value. The conventional SN duplicator composed of a flip-flop (FF) has a problem that the output SN only depends on the input SN. Therefore, if the FF-based duplicator is used in a circuit with re-convergence paths, the output SN becomes erroneous. This paper proposes an SN duplicator, 2n RRR, that can output more independent output by its improved flexibility of bit re-arrangement. With this duplicator, the errors of the hyperbolic tangent function are reduced by up to 50% compared to the duplicator that we proposed previously. Also, up to more than 99.9% of the circuit area is reduced compared to the implementation of binary computing.

    Original languageEnglish
    Title of host publication2018 New Generation of CAS, NGCAS 2018
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages182-185
    Number of pages4
    ISBN (Electronic)9781538676813
    DOIs
    Publication statusPublished - 2018 Dec 10
    Event2018 New Generation of CAS, NGCAS 2018 - Valletta, Malta
    Duration: 2018 Nov 202018 Nov 23

    Other

    Other2018 New Generation of CAS, NGCAS 2018
    CountryMalta
    CityValletta
    Period18/11/2018/11/23

    Fingerprint

    flip-flops
    Networks (circuits)
    Flip flop circuits
    output
    Hyperbolic functions
    machine learning
    tangents
    image processing
    Learning systems
    flexibility
    Image processing
    costs
    Costs
    energy

    Keywords

    • Bit re-arrangement
    • Re-convergence path
    • Stochastic computing
    • Stochastic number
    • Stochastic number duplicator

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering
    • Energy Engineering and Power Technology
    • Instrumentation

    Cite this

    Ishikawa, R., Tawada, M., Yanagisawa, M., & Togawa, N. (2018). 2n RRR: Improved stochastic number duplicator based on bit re-arrangement. In 2018 New Generation of CAS, NGCAS 2018 (pp. 182-185). [8572289] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/NGCAS.2018.8572289

    2n RRR : Improved stochastic number duplicator based on bit re-arrangement. / Ishikawa, Ryota; Tawada, Masashi; Yanagisawa, Masao; Togawa, Nozomu.

    2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 182-185 8572289.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Ishikawa, R, Tawada, M, Yanagisawa, M & Togawa, N 2018, 2n RRR: Improved stochastic number duplicator based on bit re-arrangement. in 2018 New Generation of CAS, NGCAS 2018., 8572289, Institute of Electrical and Electronics Engineers Inc., pp. 182-185, 2018 New Generation of CAS, NGCAS 2018, Valletta, Malta, 18/11/20. https://doi.org/10.1109/NGCAS.2018.8572289
    Ishikawa R, Tawada M, Yanagisawa M, Togawa N. 2n RRR: Improved stochastic number duplicator based on bit re-arrangement. In 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 182-185. 8572289 https://doi.org/10.1109/NGCAS.2018.8572289
    Ishikawa, Ryota ; Tawada, Masashi ; Yanagisawa, Masao ; Togawa, Nozomu. / 2n RRR : Improved stochastic number duplicator based on bit re-arrangement. 2018 New Generation of CAS, NGCAS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 182-185
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