3D-IC signal TSV assignment for thermal and wirelength optimization

Yuxin Qian, Cong Hao, Takeshi Yoshimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In 3D integrated circuit (3D-IC), there are two or more layers of active electronic components which are integrated both vertically and horizontally. Through-silicon-via (TSV) is used as the vertical electrical connection which enables a great deal of functionality packed into a small footprint. In this work we solve the signal TSV assignment problem in 3D-IC taking thermal problem into consideration, while only wire length is concerned in the previous work. Firstly, we propose a multilevel node-weight-oriented flow assignment algorithm to reduce wire length and temperature simultaneously. During the evaluation of wire length and temperature result, we use a thermal estimation model to evaluate temperature, where compression storage method with LU decomposition is adopted to improve algorithm efficiency. Moreover, we implement the remove and reassign optimization method which helps further optimize the TSV assignment results. The experimental results show that our algorithm provides better solution with wire length reduction and temperature decrease.

Original languageEnglish
Title of host publication2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-8
Number of pages8
Volume2017-January
ISBN (Electronic)9781509064625
DOIs
Publication statusPublished - 2017 Nov 13
Event27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017 - Thessaloniki, Greece
Duration: 2017 Sep 252017 Sep 27

Other

Other27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017
CountryGreece
CityThessaloniki
Period17/9/2517/9/27

Fingerprint

Integrated Circuits
Silicon
Assignment
Wire
Optimization
LU decomposition
Heat problems
Temperature
Assignment Problem
Optimization Methods
Compression
Vertical
Optimise
Electronics
Decomposition
Decrease
Hot Temperature
Three dimensional integrated circuits
Evaluate
Evaluation

ASJC Scopus subject areas

  • Modelling and Simulation
  • Computer Networks and Communications
  • Hardware and Architecture
  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Control and Optimization

Cite this

Qian, Y., Hao, C., & Yoshimura, T. (2017). 3D-IC signal TSV assignment for thermal and wirelength optimization. In 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017 (Vol. 2017-January, pp. 1-8). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PATMOS.2017.8106948

3D-IC signal TSV assignment for thermal and wirelength optimization. / Qian, Yuxin; Hao, Cong; Yoshimura, Takeshi.

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017. Vol. 2017-January Institute of Electrical and Electronics Engineers Inc., 2017. p. 1-8.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Qian, Y, Hao, C & Yoshimura, T 2017, 3D-IC signal TSV assignment for thermal and wirelength optimization. in 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017. vol. 2017-January, Institute of Electrical and Electronics Engineers Inc., pp. 1-8, 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017, Thessaloniki, Greece, 17/9/25. https://doi.org/10.1109/PATMOS.2017.8106948
Qian Y, Hao C, Yoshimura T. 3D-IC signal TSV assignment for thermal and wirelength optimization. In 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017. Vol. 2017-January. Institute of Electrical and Electronics Engineers Inc. 2017. p. 1-8 https://doi.org/10.1109/PATMOS.2017.8106948
Qian, Yuxin ; Hao, Cong ; Yoshimura, Takeshi. / 3D-IC signal TSV assignment for thermal and wirelength optimization. 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017. Vol. 2017-January Institute of Electrical and Electronics Engineers Inc., 2017. pp. 1-8
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