TY - GEN
T1 - A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in
AU - Liu, Kunyang
AU - Pu, Hongliang
AU - Shinohara, Hirofumi
N1 - Funding Information:
This work is supported by ROHM Co., Ltd and VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Cadence Design
Funding Information:
ACKNOWLEDGEMENTS This work is supported by ROHM Co., Ltd and VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Cadence Design Systems, Inc. and Mentor Graphics, Inc.
Publisher Copyright:
© 2020 IEEE.
PY - 2020/3
Y1 - 2020/3
N2 - This paper presents a bit-error free SRAM-based physically unclonable function (PUF) in 130-nm standard CMOS. The PUF has a compact bitcell, with a bitcell area of 497 F2. It switches from EE SRAM to CMOS SRAM mode during evaluation, achieving high native stability, low-voltage evaluation, and low-power operation. Its stability is reinforced to 100% through hot carrier injection (HCI) burn-in on the alternate-direction nMOS load, which causes no visible oxide damage and does not require additional fabrication processes or extra transistors in the bitcell. Experimental results show that the prototype chips achieved actual zero bit error across 0.5-0.7 V and -40°C to 120 °C, as well as zero error (<1E-7 BER) at the worst VT corner after accelerated aging test equivalent to 21 years of operation. The PUF functions stably down to 0.5 V, with an energy of 2.07 fJ/b, which includes both the evaluation and read-out power. The secure, compact, low-power and 100% stable features of the PUF make it an excellent candidate for the resource-constrained Internet of Things security.
AB - This paper presents a bit-error free SRAM-based physically unclonable function (PUF) in 130-nm standard CMOS. The PUF has a compact bitcell, with a bitcell area of 497 F2. It switches from EE SRAM to CMOS SRAM mode during evaluation, achieving high native stability, low-voltage evaluation, and low-power operation. Its stability is reinforced to 100% through hot carrier injection (HCI) burn-in on the alternate-direction nMOS load, which causes no visible oxide damage and does not require additional fabrication processes or extra transistors in the bitcell. Experimental results show that the prototype chips achieved actual zero bit error across 0.5-0.7 V and -40°C to 120 °C, as well as zero error (<1E-7 BER) at the worst VT corner after accelerated aging test equivalent to 21 years of operation. The PUF functions stably down to 0.5 V, with an energy of 2.07 fJ/b, which includes both the evaluation and read-out power. The secure, compact, low-power and 100% stable features of the PUF make it an excellent candidate for the resource-constrained Internet of Things security.
KW - SRAM
KW - hardware security
KW - hot carrier injection (HCI)
KW - key generation
KW - physically unclonable function (PUF)
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U2 - 10.1109/CICC48029.2020.9075875
DO - 10.1109/CICC48029.2020.9075875
M3 - Conference contribution
AN - SCOPUS:85084473926
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - 2020 IEEE Custom Integrated Circuits Conference, CICC 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Custom Integrated Circuits Conference, CICC 2020
Y2 - 22 March 2020 through 25 March 2020
ER -