A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application

Shin'ichiro Mutoh, Satoshi Shigematsu, Yasuyuki Matsuya, Hideki Fukuda, Takao Kaneko, Junzo Yamada

Research output: Contribution to journalArticle

54 Citations (Scopus)

Abstract

A 1-V power supply low-power and high-speed 16-b fixed-point digital signal processor using a 0.5-μm process has been developed for mobile phone applications. A 1-V multithreshold-voltage CMOS (MTCMOS) technology that uses both high-threshold-voltage and low-threshold-voltage transistors is one key to attaining low power consumption with keeping processing throughput high. A maximum operating frequency of 13.2 MHz and an energy consumption of 2.2 mW/MHz were achieved at 1 V. The second key to low-power operation is a power management scheme that uses a secondary embedded microprocessor. This proposed scheme minimizes the standby power in the waiting state by effectively controlling the sleep mode in the MTCMOS design. We confirmed that the standby leakage current was reduced three orders of magnitude and that the energy consumed in the waiting state was less than 1/10 of that consumed by conventional CMOS circuits with lowered supply voltage and threshold voltage but without power management.

Original languageEnglish
Pages (from-to)1795-1802
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Volume31
Issue number11
Publication statusPublished - 1996 Nov
Externally publishedYes

Fingerprint

Digital signal processors
Mobile phones
Threshold voltage
Electric potential
Leakage currents
Microprocessor chips
Transistors
Electric power utilization
Energy utilization
Throughput
Networks (circuits)
Processing
Power management

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Mutoh, S., Shigematsu, S., Matsuya, Y., Fukuda, H., Kaneko, T., & Yamada, J. (1996). A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application. IEEE Journal of Solid-State Circuits, 31(11), 1795-1802.

A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application. / Mutoh, Shin'ichiro; Shigematsu, Satoshi; Matsuya, Yasuyuki; Fukuda, Hideki; Kaneko, Takao; Yamada, Junzo.

In: IEEE Journal of Solid-State Circuits, Vol. 31, No. 11, 11.1996, p. 1795-1802.

Research output: Contribution to journalArticle

Mutoh, S, Shigematsu, S, Matsuya, Y, Fukuda, H, Kaneko, T & Yamada, J 1996, 'A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application', IEEE Journal of Solid-State Circuits, vol. 31, no. 11, pp. 1795-1802.
Mutoh, Shin'ichiro ; Shigematsu, Satoshi ; Matsuya, Yasuyuki ; Fukuda, Hideki ; Kaneko, Takao ; Yamada, Junzo. / A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application. In: IEEE Journal of Solid-State Circuits. 1996 ; Vol. 31, No. 11. pp. 1795-1802.
@article{d5f9b1ab8a4c4e0f9086e34a66281dd3,
title = "A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application",
abstract = "A 1-V power supply low-power and high-speed 16-b fixed-point digital signal processor using a 0.5-μm process has been developed for mobile phone applications. A 1-V multithreshold-voltage CMOS (MTCMOS) technology that uses both high-threshold-voltage and low-threshold-voltage transistors is one key to attaining low power consumption with keeping processing throughput high. A maximum operating frequency of 13.2 MHz and an energy consumption of 2.2 mW/MHz were achieved at 1 V. The second key to low-power operation is a power management scheme that uses a secondary embedded microprocessor. This proposed scheme minimizes the standby power in the waiting state by effectively controlling the sleep mode in the MTCMOS design. We confirmed that the standby leakage current was reduced three orders of magnitude and that the energy consumed in the waiting state was less than 1/10 of that consumed by conventional CMOS circuits with lowered supply voltage and threshold voltage but without power management.",
author = "Shin'ichiro Mutoh and Satoshi Shigematsu and Yasuyuki Matsuya and Hideki Fukuda and Takao Kaneko and Junzo Yamada",
year = "1996",
month = "11",
language = "English",
volume = "31",
pages = "1795--1802",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "11",

}

TY - JOUR

T1 - A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application

AU - Mutoh, Shin'ichiro

AU - Shigematsu, Satoshi

AU - Matsuya, Yasuyuki

AU - Fukuda, Hideki

AU - Kaneko, Takao

AU - Yamada, Junzo

PY - 1996/11

Y1 - 1996/11

N2 - A 1-V power supply low-power and high-speed 16-b fixed-point digital signal processor using a 0.5-μm process has been developed for mobile phone applications. A 1-V multithreshold-voltage CMOS (MTCMOS) technology that uses both high-threshold-voltage and low-threshold-voltage transistors is one key to attaining low power consumption with keeping processing throughput high. A maximum operating frequency of 13.2 MHz and an energy consumption of 2.2 mW/MHz were achieved at 1 V. The second key to low-power operation is a power management scheme that uses a secondary embedded microprocessor. This proposed scheme minimizes the standby power in the waiting state by effectively controlling the sleep mode in the MTCMOS design. We confirmed that the standby leakage current was reduced three orders of magnitude and that the energy consumed in the waiting state was less than 1/10 of that consumed by conventional CMOS circuits with lowered supply voltage and threshold voltage but without power management.

AB - A 1-V power supply low-power and high-speed 16-b fixed-point digital signal processor using a 0.5-μm process has been developed for mobile phone applications. A 1-V multithreshold-voltage CMOS (MTCMOS) technology that uses both high-threshold-voltage and low-threshold-voltage transistors is one key to attaining low power consumption with keeping processing throughput high. A maximum operating frequency of 13.2 MHz and an energy consumption of 2.2 mW/MHz were achieved at 1 V. The second key to low-power operation is a power management scheme that uses a secondary embedded microprocessor. This proposed scheme minimizes the standby power in the waiting state by effectively controlling the sleep mode in the MTCMOS design. We confirmed that the standby leakage current was reduced three orders of magnitude and that the energy consumed in the waiting state was less than 1/10 of that consumed by conventional CMOS circuits with lowered supply voltage and threshold voltage but without power management.

UR - http://www.scopus.com/inward/record.url?scp=0030290765&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030290765&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0030290765

VL - 31

SP - 1795

EP - 1802

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 11

ER -