A 105Gb/s 300GHz CMOS transmitter

Kyoya Takano; Shuhei Amakawa; Kosuke Katayama; Shinsuke Hara; Ruibing Dong; Akifumi Kasamatsu; Iwao Hosako; Koichi Mizuno; Kazuaki Takahashi; Takeshi Yoshida; Minoru Fujishima

doi:10.1109/ISSCC.2017.7870384

A 105Gb/s 300GHz CMOS transmitter

Kyoya Takano, Shuhei Amakawa, Kosuke Katayama, Shinsuke Hara, Ruibing Dong, Akifumi Kasamatsu, Iwao Hosako, Koichi Mizuno, Kazuaki Takahashi, Takeshi Yoshida, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

57 Citations (Scopus)

Abstract

'High speed' in communications often means 'high data-rate' and fiber-optic technologies have long been ahead of wireless technologies in that regard. However, an often overlooked definite advantage of wireless links over fiber-optic links is that waves travel at the speed of light c, which is about 50% faster than in optical fibers as shown in Fig. 17.9.1 (top left). This 'minimum latency' is crucial for applications requiring real-time responses over a long distance, including high-frequency trading [1]. Further opportunities and new applications might be created if the absolute minimum latency and fiber-optic data-rates are put together. (Sub-)THz frequencies have an extremely broad atmospheric transmission window with manageable losses as shown in Fig. 17.9.1 (top right) and will be ideal for building light-speed links supporting fiber-optic data-rates. This paper presents a 105Gb/s 300GHz transmitter (TX) fabricated using a 40nm CMOS process.

Original language	English
Title of host publication	2017 IEEE International Solid-State Circuits Conference, ISSCC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	308-309
Number of pages	2
Volume	60
ISBN (Electronic)	9781509037575
DOIs	https://doi.org/10.1109/ISSCC.2017.7870384
Publication status	Published - 2017 Mar 2
Externally published	Yes
Event	64th IEEE International Solid-State Circuits Conference, ISSCC 2017 - San Francisco, United States Duration: 2017 Feb 5 → 2017 Feb 9

Other

Other	64th IEEE International Solid-State Circuits Conference, ISSCC 2017
Country	United States
City	San Francisco
Period	17/2/5 → 17/2/9

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ISSCC.2017.7870384

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Takano, K., Amakawa, S., Katayama, K., Hara, S., Dong, R., Kasamatsu, A., Hosako, I., Mizuno, K., Takahashi, K., Yoshida, T., & Fujishima, M. (2017). A 105Gb/s 300GHz CMOS transmitter. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017 (Vol. 60, pp. 308-309). [7870384] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2017.7870384

A 105Gb/s 300GHz CMOS transmitter. / Takano, Kyoya; Amakawa, Shuhei; Katayama, Kosuke; Hara, Shinsuke; Dong, Ruibing; Kasamatsu, Akifumi; Hosako, Iwao; Mizuno, Koichi; Takahashi, Kazuaki; Yoshida, Takeshi; Fujishima, Minoru.

2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Vol. 60 Institute of Electrical and Electronics Engineers Inc., 2017. p. 308-309 7870384.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Takano, K, Amakawa, S, Katayama, K, Hara, S, Dong, R, Kasamatsu, A, Hosako, I, Mizuno, K, Takahashi, K, Yoshida, T & Fujishima, M 2017, A 105Gb/s 300GHz CMOS transmitter. in 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. vol. 60, 7870384, Institute of Electrical and Electronics Engineers Inc., pp. 308-309, 64th IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, United States, 17/2/5. https://doi.org/10.1109/ISSCC.2017.7870384

Takano, Kyoya ; Amakawa, Shuhei ; Katayama, Kosuke ; Hara, Shinsuke ; Dong, Ruibing ; Kasamatsu, Akifumi ; Hosako, Iwao ; Mizuno, Koichi ; Takahashi, Kazuaki ; Yoshida, Takeshi ; Fujishima, Minoru. / A 105Gb/s 300GHz CMOS transmitter. 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Vol. 60 Institute of Electrical and Electronics Engineers Inc., 2017. pp. 308-309

@inproceedings{4d477612208e4ce6b31e79f243ee7b63,

title = "A 105Gb/s 300GHz CMOS transmitter",

abstract = "'High speed' in communications often means 'high data-rate' and fiber-optic technologies have long been ahead of wireless technologies in that regard. However, an often overlooked definite advantage of wireless links over fiber-optic links is that waves travel at the speed of light c, which is about 50% faster than in optical fibers as shown in Fig. 17.9.1 (top left). This 'minimum latency' is crucial for applications requiring real-time responses over a long distance, including high-frequency trading [1]. Further opportunities and new applications might be created if the absolute minimum latency and fiber-optic data-rates are put together. (Sub-)THz frequencies have an extremely broad atmospheric transmission window with manageable losses as shown in Fig. 17.9.1 (top right) and will be ideal for building light-speed links supporting fiber-optic data-rates. This paper presents a 105Gb/s 300GHz transmitter (TX) fabricated using a 40nm CMOS process.",

author = "Kyoya Takano and Shuhei Amakawa and Kosuke Katayama and Shinsuke Hara and Ruibing Dong and Akifumi Kasamatsu and Iwao Hosako and Koichi Mizuno and Kazuaki Takahashi and Takeshi Yoshida and Minoru Fujishima",

year = "2017",

month = mar,

day = "2",

doi = "10.1109/ISSCC.2017.7870384",

language = "English",

volume = "60",

pages = "308--309",

booktitle = "2017 IEEE International Solid-State Circuits Conference, ISSCC 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "64th IEEE International Solid-State Circuits Conference, ISSCC 2017 ; Conference date: 05-02-2017 Through 09-02-2017",

}

TY - GEN

T1 - A 105Gb/s 300GHz CMOS transmitter

AU - Takano, Kyoya

AU - Amakawa, Shuhei

AU - Katayama, Kosuke

AU - Hara, Shinsuke

AU - Dong, Ruibing

AU - Kasamatsu, Akifumi

AU - Hosako, Iwao

AU - Mizuno, Koichi

AU - Takahashi, Kazuaki

AU - Yoshida, Takeshi

AU - Fujishima, Minoru

PY - 2017/3/2

Y1 - 2017/3/2

N2 - 'High speed' in communications often means 'high data-rate' and fiber-optic technologies have long been ahead of wireless technologies in that regard. However, an often overlooked definite advantage of wireless links over fiber-optic links is that waves travel at the speed of light c, which is about 50% faster than in optical fibers as shown in Fig. 17.9.1 (top left). This 'minimum latency' is crucial for applications requiring real-time responses over a long distance, including high-frequency trading [1]. Further opportunities and new applications might be created if the absolute minimum latency and fiber-optic data-rates are put together. (Sub-)THz frequencies have an extremely broad atmospheric transmission window with manageable losses as shown in Fig. 17.9.1 (top right) and will be ideal for building light-speed links supporting fiber-optic data-rates. This paper presents a 105Gb/s 300GHz transmitter (TX) fabricated using a 40nm CMOS process.

AB - 'High speed' in communications often means 'high data-rate' and fiber-optic technologies have long been ahead of wireless technologies in that regard. However, an often overlooked definite advantage of wireless links over fiber-optic links is that waves travel at the speed of light c, which is about 50% faster than in optical fibers as shown in Fig. 17.9.1 (top left). This 'minimum latency' is crucial for applications requiring real-time responses over a long distance, including high-frequency trading [1]. Further opportunities and new applications might be created if the absolute minimum latency and fiber-optic data-rates are put together. (Sub-)THz frequencies have an extremely broad atmospheric transmission window with manageable losses as shown in Fig. 17.9.1 (top right) and will be ideal for building light-speed links supporting fiber-optic data-rates. This paper presents a 105Gb/s 300GHz transmitter (TX) fabricated using a 40nm CMOS process.

UR - http://www.scopus.com/inward/record.url?scp=85016288438&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85016288438&partnerID=8YFLogxK

U2 - 10.1109/ISSCC.2017.7870384

DO - 10.1109/ISSCC.2017.7870384

M3 - Conference contribution

AN - SCOPUS:85016288438

VL - 60

SP - 308

EP - 309

BT - 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 64th IEEE International Solid-State Circuits Conference, ISSCC 2017

Y2 - 5 February 2017 through 9 February 2017

ER -