A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applications

Hajime Kubosawa, Hiromasa Takahashi, Satoshi Ando, Yoshimi Asada, Akira Asato, Atsuhiro Suga, Michihide Kimura, Naoshi Higaki, Hideo Miyake, Tomio Sato, Hideaki Anbutsu, Toshitaka Tsuda, Tetsuo Yoshimura, Isao Amano, Mutsuaki Kai, Shin Mitarai

    Research output: Contribution to journalArticle

    3 Citations (Scopus)

    Abstract

    We have designed a microprocessor that is based on a single instruction multiple data stream (SIMD) architecture. It features a two-way superscalar architecture for multimedia embedded systems that need to support especially MPEG2 video decoding/encoding and 3DCG image processing. This microprocessor meets all requirements of embedded systems, including a) MPEG2 (MP@Ml.) decoding and graphic processing capabilities for three-dimensional images, b) programming flexibility. and c) low power consumption and low manufacturing cost. High performance was achieved by enhanced parallel processing capabilities while adopting a SIMD architecture and a two-way superscalar architecture. Programming flexibility was increased by providing 170 dedicated multimedia instructions. Low power consumption was achieved by utilizing advanced process technology and power-saving circuits. The processor supports a general-purpose RISC instruction set This feature is important, as the processor will have to work as a controller of various target systems. The processor has been fabricated by 0.21-μm CMOS four-metal technology on a 9.84 × 10.12 mm die. It performs 2.16 GOPS/720 MFLOPS at an operating frequency of 180 MHz, with a power consumption of 1.2 W and a power supply of 1.8 V.

    Original languageEnglish
    Pages (from-to)1640-1646
    Number of pages7
    JournalIEEE Journal of Solid-State Circuits
    Volume33
    Issue number11
    DOIs
    Publication statusPublished - 1998 Nov

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    Keywords

    • Embedded microprocessors
    • MPEG2
    • Multimedia
    • Programming flexibility
    • Single instruction multiple data stream
    • Superscalar

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Kubosawa, H., Takahashi, H., Ando, S., Asada, Y., Asato, A., Suga, A., Kimura, M., Higaki, N., Miyake, H., Sato, T., Anbutsu, H., Tsuda, T., Yoshimura, T., Amano, I., Kai, M., & Mitarai, S. (1998). A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applications. IEEE Journal of Solid-State Circuits, 33(11), 1640-1646. https://doi.org/10.1109/4.726550