A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS

Cuilin Chen; Tsuyoshi Sugiura; Toshihiko Yoshimasu

doi:10.23919/EuMIC.2018.8539942

A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS

Cuilin Chen, Tsuyoshi Sugiura, Toshihiko Yoshimasu

Graduate School of Information, Production and Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.

Original language	English
Title of host publication	EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	182-185
Number of pages	4
ISBN (Electronic)	9782874870521
DOIs	https://doi.org/10.23919/EuMIC.2018.8539942
Publication status	Published - 2018 Nov 16
Event	13th European Microwave Integrated Circuits Conference, EuMIC 2018 - Madrid, Spain Duration: 2018 Sep 24 → 2018 Sep 25

Other

Other	13th European Microwave Integrated Circuits Conference, EuMIC 2018
Country	Spain
City	Madrid
Period	18/9/24 → 18/9/25

Keywords

adaptive bias circuit
high efficiency
high linearity
SOI CMOS

ASJC Scopus subject areas

Computer Networks and Communications
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Instrumentation

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10.23919/EuMIC.2018.8539942

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A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. / Chen, Cuilin; Sugiura, Tsuyoshi; Yoshimasu, Toshihiko.

EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2018. p. 182-185 8539942.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chen, C, Sugiura, T & Yoshimasu, T 2018, A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. in EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference., 8539942, Institute of Electrical and Electronics Engineers Inc., pp. 182-185, 13th European Microwave Integrated Circuits Conference, EuMIC 2018, Madrid, Spain, 18/9/24. https://doi.org/10.23919/EuMIC.2018.8539942

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title = "A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS",

abstract = "A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.",

keywords = "adaptive bias circuit, high efficiency, high linearity, SOI CMOS",

author = "Cuilin Chen and Tsuyoshi Sugiura and Toshihiko Yoshimasu",

year = "2018",

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doi = "10.23919/EuMIC.2018.8539942",

language = "English",

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booktitle = "EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference",

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AU - Yoshimasu, Toshihiko

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N2 - A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.

AB - A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.

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KW - high efficiency

KW - high linearity

KW - SOI CMOS

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BT - EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference

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A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS

Abstract

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Keywords

ASJC Scopus subject areas

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