A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS

Cuilin Chen, Tsuyoshi Sugiura, Toshihiko Yoshimasu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.

Original languageEnglish
Title of host publicationEuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages182-185
Number of pages4
ISBN (Electronic)9782874870521
DOIs
Publication statusPublished - 2018 Nov 16
Event13th European Microwave Integrated Circuits Conference, EuMIC 2018 - Madrid, Spain
Duration: 2018 Sep 242018 Sep 25

Other

Other13th European Microwave Integrated Circuits Conference, EuMIC 2018
CountrySpain
CityMadrid
Period18/9/2418/9/25

Fingerprint

SOI (semiconductors)
power amplifiers
Field effect transistors
Power amplifiers
CMOS
field effect transistors
linear amplifiers
wireless communication
linearity
telecommunication
Communication systems
Networks (circuits)
output
Electric potential
electric potential

Keywords

  • adaptive bias circuit
  • high efficiency
  • high linearity
  • SOI CMOS

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Instrumentation

Cite this

Chen, C., Sugiura, T., & Yoshimasu, T. (2018). A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. In EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference (pp. 182-185). [8539942] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/EuMIC.2018.8539942

A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. / Chen, Cuilin; Sugiura, Tsuyoshi; Yoshimasu, Toshihiko.

EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2018. p. 182-185 8539942.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chen, C, Sugiura, T & Yoshimasu, T 2018, A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. in EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference., 8539942, Institute of Electrical and Electronics Engineers Inc., pp. 182-185, 13th European Microwave Integrated Circuits Conference, EuMIC 2018, Madrid, Spain, 18/9/24. https://doi.org/10.23919/EuMIC.2018.8539942
Chen C, Sugiura T, Yoshimasu T. A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. In EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc. 2018. p. 182-185. 8539942 https://doi.org/10.23919/EuMIC.2018.8539942
Chen, Cuilin ; Sugiura, Tsuyoshi ; Yoshimasu, Toshihiko. / A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS. EuMIC 2018 - 2018 13th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 182-185
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abstract = "A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1{\%}. Moreover, the peak PAE of 41.6{\%} is achieved in efficient mode.",
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