A 16M SRAM with improved characteristics using DRAM technology

Yuji Kihara, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto, Yasuhiro Konishi, Tsutomu Yoshihara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)

    Abstract

    A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.

    Original languageEnglish
    Title of host publication2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005
    Pages17-20
    Number of pages4
    DOIs
    Publication statusPublished - 2006
    Event1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005 - Hsinchu
    Duration: 2005 Nov 12005 Nov 3

    Other

    Other1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005
    CityHsinchu
    Period05/11/105/11/3

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Electronic, Optical and Magnetic Materials

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  • Cite this

    Kihara, Y., Nakashima, Y., Izutsu, T., Nakamoto, M., Konishi, Y., & Yoshihara, T. (2006). A 16M SRAM with improved characteristics using DRAM technology. In 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005 (pp. 17-20). [4017520] https://doi.org/10.1109/ASSCC.2005.251778