A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder

Gang He, Dajiang Zhou, Jinjia Zhou, Satoshi Goto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an H.264/AVC intra prediction design for Super Hi-Vision (SHV) video. Due to huge throughput requirements, design challenges such as data dependency and complexity become even more critical. To solve these problems, we first propose an interlaced block reordering scheme together with a coarse-to-fine mode decision (CFMD) strategy to resolve the data dependency between intra mode decision and reconstruction. Circuits area is reduced in the meantime with CFMD. We also propose a probability-based reconstruction scheme to solve the problem from long pipeline latency. As a result, hardware complexity in terms of the product of area and frequency is reduced by 74%. The maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video. Total logic gate count is 451.5k in 65nm library.

Original languageEnglish
Title of host publicationEuropean Signal Processing Conference
Pages1054-1058
Number of pages5
Publication statusPublished - 2012
Event20th European Signal Processing Conference, EUSIPCO 2012 - Bucharest
Duration: 2012 Aug 272012 Aug 31

Other

Other20th European Signal Processing Conference, EUSIPCO 2012
CityBucharest
Period12/8/2712/8/31

Keywords

  • H.264/AVC
  • hardware architecture
  • intra prediction
  • SHV

ASJC Scopus subject areas

  • Signal Processing
  • Electrical and Electronic Engineering

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  • Cite this

    He, G., Zhou, D., Zhou, J., & Goto, S. (2012). A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder. In European Signal Processing Conference (pp. 1054-1058). [6334062]