A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic

Yimeng Zhang, Mengshu Huang, Nan Wang, Satoshi Goto, Tsutomu Yoshihara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven, low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18μm CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1pJ/cycle when working at the frequency of 403MHz, which is only 36% of PE with conventional static CMOS gates. The measurement results shows that the test chip can work as high as 609MHz with the energy dissipation of 2.1pJ/cycle.

    Original languageEnglish
    Title of host publication2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011
    Pages213-216
    Number of pages4
    DOIs
    Publication statusPublished - 2011
    Event7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 - Jeju
    Duration: 2011 Nov 142011 Nov 16

    Other

    Other7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011
    CityJeju
    Period11/11/1411/11/16

    Fingerprint

    Engines
    Recovery
    Processing
    Energy dissipation
    Networks (circuits)

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

    Cite this

    Zhang, Y., Huang, M., Wang, N., Goto, S., & Yoshihara, T. (2011). A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic. In 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 (pp. 213-216). [6123640] https://doi.org/10.1109/ASSCC.2011.6123640

    A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic. / Zhang, Yimeng; Huang, Mengshu; Wang, Nan; Goto, Satoshi; Yoshihara, Tsutomu.

    2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. p. 213-216 6123640.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Zhang, Y, Huang, M, Wang, N, Goto, S & Yoshihara, T 2011, A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic. in 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011., 6123640, pp. 213-216, 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011, Jeju, 11/11/14. https://doi.org/10.1109/ASSCC.2011.6123640
    Zhang Y, Huang M, Wang N, Goto S, Yoshihara T. A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic. In 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. p. 213-216. 6123640 https://doi.org/10.1109/ASSCC.2011.6123640
    Zhang, Yimeng ; Huang, Mengshu ; Wang, Nan ; Goto, Satoshi ; Yoshihara, Tsutomu. / A 1pJ/cycle Processing Engine in LDPC application with charge recovery logic. 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. pp. 213-216
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