A 2-GHz-band low-phase-noise VCO IC with an LC bias circuit in 180-nm CMOS

Xiao Xu, Xin Yang, Toshihiko Yoshimasu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A novel LC bias topology is proposed to improve the phase noise of VCO IC for ultra-low-voltage applications. The LC bias circuit works as an impedance transformation network, which improves the phase noise of VCO by delivering higher power to the gates of the cross-coupled transistors. A 2-GHz-band ultra-low-voltage VCO IC with the novel LC bias circuit has been designed, fabricated and fully evaluated in 180-nm CMOS technology. The fabricated novel VCO IC has exhibited a measured phase noise of -126.4 dBc/Hz at 1 MHz offset frequency from the 2.03 GHz carrier frequency with a supply voltage of 0.5 V.

Original languageEnglish
Title of host publicationEuMIC 2016 - 11th European Microwave Integrated Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages197-200
Number of pages4
ISBN (Electronic)9782874870446
DOIs
Publication statusPublished - 2016 Dec 7
Event11th European Microwave Integrated Circuits Conference, EuMIC 2016 - London, United Kingdom
Duration: 2016 Oct 32016 Oct 4

Other

Other11th European Microwave Integrated Circuits Conference, EuMIC 2016
CountryUnited Kingdom
CityLondon
Period16/10/316/10/4

Keywords

  • 180-nm CMOS
  • 2-GHz-band
  • LC bias circuit
  • low phase noise
  • ultra-low-voltage
  • VCO

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Instrumentation

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    Xu, X., Yang, X., & Yoshimasu, T. (2016). A 2-GHz-band low-phase-noise VCO IC with an LC bias circuit in 180-nm CMOS. In EuMIC 2016 - 11th European Microwave Integrated Circuits Conference (pp. 197-200). [7777524] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EuMIC.2016.7777524