A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS

Dajiang Zhou; Gang He; Wei Fei; Zhixiang Chen; Jinjia Zhou; Satoshi Goto

doi:10.1109/ASPDAC.2013.6509562

A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS

Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

Information, Production and Systems Research Center

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p 30fps encoding dissipates only 2mW at 0.8V and 9MHz.

Original language	English
Title of host publication	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Pages	73-74
Number of pages	2
DOIs	https://doi.org/10.1109/ASPDAC.2013.6509562
Publication status	Published - 2013
Event	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama Duration: 2013 Jan 22 → 2013 Jan 25

Other

Other	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
City	Yokohama
Period	13/1/22 → 13/1/25

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Science Applications
Computer Graphics and Computer-Aided Design

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Zhou, D, He, G, Fei, W, Chen, Z, Zhou, J & Goto, S 2013, A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC., 6509562, pp. 73-74, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, 13/1/22. https://doi.org/10.1109/ASPDAC.2013.6509562

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abstract = "An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p 30fps encoding dissipates only 2mW at 0.8V and 9MHz.",

author = "Dajiang Zhou and Gang He and Wei Fei and Zhixiang Chen and Jinjia Zhou and Satoshi Goto",

year = "2013",

doi = "10.1109/ASPDAC.2013.6509562",

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AU - Goto, Satoshi

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N2 - An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p 30fps encoding dissipates only 2mW at 0.8V and 9MHz.

AB - An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p 30fps encoding dissipates only 2mW at 0.8V and 9MHz.

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A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS

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