A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode

Yasuhiro Konishi, Katsumi Dosaka, Takahiro Komatsu, Yoshinori Ionue, Masaki Kumanoya, Yoichi Tobita, Hideki Genjyo, Masao Nagatomo, Tsutomu Yoshihara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

A 4-Mb DRAM that has 38-ns RAS (row-address-strobe) access time and a battery-backup (BBU) mode, and retains data with a 44-μA current requirement is described. The BBU mode is a self-refresh mode. Its power dissipation, however, is reduced in comparison with that of a normal refresh operation. The memory can operate as a standard 4-Mb DRAM, without any timing constraint on CAS (column-address-strobe) and RAS, if the operating cycle does not exceed 16 ms. This approach promises more stable supply at lower cost than specially provided counterparts such as pseudo-SRAMs.

Original languageEnglish
Title of host publicationDigest of Technical Papers - IEEE International Solid-State Circuits Conference
PublisherPubl by IEEE
Pages230-231, 30
Publication statusPublished - 1990 Jul
Externally publishedYes
Event1990 IEEE International Solid-State Circuits Conference - 37th ISSCC - San Francisco, CA, USA
Duration: 1990 Feb 141990 Feb 16

Other

Other1990 IEEE International Solid-State Circuits Conference - 37th ISSCC
CitySan Francisco, CA, USA
Period90/2/1490/2/16

Fingerprint

Dynamic random access storage
Static random access storage
Energy dissipation
Data storage equipment
Costs

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Konishi, Y., Dosaka, K., Komatsu, T., Ionue, Y., Kumanoya, M., Tobita, Y., ... Yoshihara, T. (1990). A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (pp. 230-231, 30). Publ by IEEE.

A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. / Konishi, Yasuhiro; Dosaka, Katsumi; Komatsu, Takahiro; Ionue, Yoshinori; Kumanoya, Masaki; Tobita, Yoichi; Genjyo, Hideki; Nagatomo, Masao; Yoshihara, Tsutomu.

Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Publ by IEEE, 1990. p. 230-231, 30.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Konishi, Y, Dosaka, K, Komatsu, T, Ionue, Y, Kumanoya, M, Tobita, Y, Genjyo, H, Nagatomo, M & Yoshihara, T 1990, A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. in Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Publ by IEEE, pp. 230-231, 30, 1990 IEEE International Solid-State Circuits Conference - 37th ISSCC, San Francisco, CA, USA, 90/2/14.
Konishi Y, Dosaka K, Komatsu T, Ionue Y, Kumanoya M, Tobita Y et al. A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Publ by IEEE. 1990. p. 230-231, 30
Konishi, Yasuhiro ; Dosaka, Katsumi ; Komatsu, Takahiro ; Ionue, Yoshinori ; Kumanoya, Masaki ; Tobita, Yoichi ; Genjyo, Hideki ; Nagatomo, Masao ; Yoshihara, Tsutomu. / A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Publ by IEEE, 1990. pp. 230-231, 30
@inproceedings{56c743070f9144029718fc3c03039f1b,
title = "A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode",
abstract = "A 4-Mb DRAM that has 38-ns RAS (row-address-strobe) access time and a battery-backup (BBU) mode, and retains data with a 44-μA current requirement is described. The BBU mode is a self-refresh mode. Its power dissipation, however, is reduced in comparison with that of a normal refresh operation. The memory can operate as a standard 4-Mb DRAM, without any timing constraint on CAS (column-address-strobe) and RAS, if the operating cycle does not exceed 16 ms. This approach promises more stable supply at lower cost than specially provided counterparts such as pseudo-SRAMs.",
author = "Yasuhiro Konishi and Katsumi Dosaka and Takahiro Komatsu and Yoshinori Ionue and Masaki Kumanoya and Yoichi Tobita and Hideki Genjyo and Masao Nagatomo and Tsutomu Yoshihara",
year = "1990",
month = "7",
language = "English",
pages = "230--231, 30",
booktitle = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",
publisher = "Publ by IEEE",

}

TY - GEN

T1 - A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode

AU - Konishi, Yasuhiro

AU - Dosaka, Katsumi

AU - Komatsu, Takahiro

AU - Ionue, Yoshinori

AU - Kumanoya, Masaki

AU - Tobita, Yoichi

AU - Genjyo, Hideki

AU - Nagatomo, Masao

AU - Yoshihara, Tsutomu

PY - 1990/7

Y1 - 1990/7

N2 - A 4-Mb DRAM that has 38-ns RAS (row-address-strobe) access time and a battery-backup (BBU) mode, and retains data with a 44-μA current requirement is described. The BBU mode is a self-refresh mode. Its power dissipation, however, is reduced in comparison with that of a normal refresh operation. The memory can operate as a standard 4-Mb DRAM, without any timing constraint on CAS (column-address-strobe) and RAS, if the operating cycle does not exceed 16 ms. This approach promises more stable supply at lower cost than specially provided counterparts such as pseudo-SRAMs.

AB - A 4-Mb DRAM that has 38-ns RAS (row-address-strobe) access time and a battery-backup (BBU) mode, and retains data with a 44-μA current requirement is described. The BBU mode is a self-refresh mode. Its power dissipation, however, is reduced in comparison with that of a normal refresh operation. The memory can operate as a standard 4-Mb DRAM, without any timing constraint on CAS (column-address-strobe) and RAS, if the operating cycle does not exceed 16 ms. This approach promises more stable supply at lower cost than specially provided counterparts such as pseudo-SRAMs.

UR - http://www.scopus.com/inward/record.url?scp=0025450663&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0025450663&partnerID=8YFLogxK

M3 - Conference contribution

SP - 230-231, 30

BT - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

PB - Publ by IEEE

ER -