A 416-mW 32-Gbit/s 300-GHz CMOS receiver

Shinsuke Hara, Kosuke Katayama, Kyoya Takano, Ruibing Dong, Issei Watanabe, Norihiko Sekine, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, fmax. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are-18 dB and 33 GHz, respectively. The receiver achieves a wireless data rate of 32 Gb/s with 16QAM.

Original languageEnglish
Title of host publication2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages65-67
Number of pages3
ISBN (Electronic)9781509040360
DOIs
Publication statusPublished - 2017 Sep 20
Externally publishedYes
Event2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 - Seoul, Korea, Republic of
Duration: 2017 Aug 302017 Sep 1

Other

Other2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
CountryKorea, Republic of
CitySeoul
Period17/8/3017/9/1

Keywords

  • quadrature amplitude modulation
  • Receiver
  • terahertz

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Instrumentation

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  • Cite this

    Hara, S., Katayama, K., Takano, K., Dong, R., Watanabe, I., Sekine, N., Kasamatsu, A., Yoshida, T., Amakawa, S., & Fujishima, M. (2017). A 416-mW 32-Gbit/s 300-GHz CMOS receiver. In 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 (pp. 65-67). [8048291] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIT.2017.8048291