A 416-mW 32-Gbit/s 300-GHz CMOS receiver

Shinsuke Hara, Kosuke Katayama, Kyoya Takano, Ruibing Dong, Issei Watanabe, Norihiko Sekine, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, fmax. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are-18 dB and 33 GHz, respectively. The receiver achieves a wireless data rate of 32 Gb/s with 16QAM.

Original languageEnglish
Title of host publication2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages65-67
Number of pages3
ISBN (Electronic)9781509040360
DOIs
Publication statusPublished - 2017 Sep 20
Externally publishedYes
Event2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 - Seoul, Korea, Republic of
Duration: 2017 Aug 302017 Sep 1

Publication series

Name2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017

Other

Other2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
Country/TerritoryKorea, Republic of
CitySeoul
Period17/8/3017/9/1

Keywords

  • Receiver
  • quadrature amplitude modulation
  • terahertz

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Instrumentation

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