A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

S. Torii, S. Suzuki, H. Tomonaga, T. Tokue, J. Sakai, N. Suzuki, K. Murakami, T. Hiraga, K. Shigemoto, Y. Tatebe, E. Ohbuchi, N. Kayama, M. Edahiro, T. Kusano, N. Nishi

Research output: Contribution to journalConference articlepeer-review


A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.

Original languageEnglish
Article number7.5
Pages (from-to)102-103+553
JournalDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication statusPublished - 2005
Externally publishedYes
Event2005 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: 2005 Feb 62005 Feb 10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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