A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications

Yijin Zhao; Jinjia Zhou; Dajiang Zhou; Satoshi Goto

doi:10.1109/ICIP.2014.7025253

A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications

Yijin Zhao, Jinjia Zhou, Dajiang Zhou, Satoshi Goto

Information, Production and Systems Research Center

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

This paper presents a high-throughput decoder of HEVC context-based adaptive binary arithmetic coding (CABAC). A multi-sub-engine arithmetic decoder (MSE-AD) design is proposed to increase the average number of bins delivered per clock cycle by adaptively processing different patterns of upcoming bins with balanced critical path delay. A syntax element (SE) grouping scheme is proposed to maximize the utilization of MSE-AD under the SE parsing order specified in the standard. We also employ a prediction-based pipeline to alleviate the data hazard problem. The proposed CABAC decoder delivers 2.36 bins per clock cycle and achieves a maximum clock frequency of 258MHz in 90nm technology. The resulting performance is 610 Mbin/s which is enough for H.265/HEVC level 6.1 (8K×4K@60fps) applications.

Original language	English
Title of host publication	2014 IEEE International Conference on Image Processing, ICIP 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1268-1272
Number of pages	5
ISBN (Print)	9781479957514
DOIs	https://doi.org/10.1109/ICIP.2014.7025253
Publication status	Published - 2014 Jan 28

Keywords

CABAC
entropy coding
H.265/HEVC
level 6.1

ASJC Scopus subject areas

Computer Vision and Pattern Recognition

Access to Document

10.1109/ICIP.2014.7025253

Cite this

@inproceedings{48a097adf8834e0791413486b4268cf9,

title = "A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications",

abstract = "This paper presents a high-throughput decoder of HEVC context-based adaptive binary arithmetic coding (CABAC). A multi-sub-engine arithmetic decoder (MSE-AD) design is proposed to increase the average number of bins delivered per clock cycle by adaptively processing different patterns of upcoming bins with balanced critical path delay. A syntax element (SE) grouping scheme is proposed to maximize the utilization of MSE-AD under the SE parsing order specified in the standard. We also employ a prediction-based pipeline to alleviate the data hazard problem. The proposed CABAC decoder delivers 2.36 bins per clock cycle and achieves a maximum clock frequency of 258MHz in 90nm technology. The resulting performance is 610 Mbin/s which is enough for H.265/HEVC level 6.1 (8K×4K@60fps) applications.",

keywords = "CABAC, entropy coding, H.265/HEVC, level 6.1",

author = "Yijin Zhao and Jinjia Zhou and Dajiang Zhou and Satoshi Goto",

year = "2014",

month = jan,

day = "28",

doi = "10.1109/ICIP.2014.7025253",

language = "English",

isbn = "9781479957514",

pages = "1268--1272",

booktitle = "2014 IEEE International Conference on Image Processing, ICIP 2014",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications

AU - Zhao, Yijin

AU - Zhou, Jinjia

AU - Zhou, Dajiang

AU - Goto, Satoshi

PY - 2014/1/28

Y1 - 2014/1/28

N2 - This paper presents a high-throughput decoder of HEVC context-based adaptive binary arithmetic coding (CABAC). A multi-sub-engine arithmetic decoder (MSE-AD) design is proposed to increase the average number of bins delivered per clock cycle by adaptively processing different patterns of upcoming bins with balanced critical path delay. A syntax element (SE) grouping scheme is proposed to maximize the utilization of MSE-AD under the SE parsing order specified in the standard. We also employ a prediction-based pipeline to alleviate the data hazard problem. The proposed CABAC decoder delivers 2.36 bins per clock cycle and achieves a maximum clock frequency of 258MHz in 90nm technology. The resulting performance is 610 Mbin/s which is enough for H.265/HEVC level 6.1 (8K×4K@60fps) applications.

AB - This paper presents a high-throughput decoder of HEVC context-based adaptive binary arithmetic coding (CABAC). A multi-sub-engine arithmetic decoder (MSE-AD) design is proposed to increase the average number of bins delivered per clock cycle by adaptively processing different patterns of upcoming bins with balanced critical path delay. A syntax element (SE) grouping scheme is proposed to maximize the utilization of MSE-AD under the SE parsing order specified in the standard. We also employ a prediction-based pipeline to alleviate the data hazard problem. The proposed CABAC decoder delivers 2.36 bins per clock cycle and achieves a maximum clock frequency of 258MHz in 90nm technology. The resulting performance is 610 Mbin/s which is enough for H.265/HEVC level 6.1 (8K×4K@60fps) applications.

KW - CABAC

KW - entropy coding

KW - H.265/HEVC

KW - level 6.1

UR - http://www.scopus.com/inward/record.url?scp=84939216500&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84939216500&partnerID=8YFLogxK

U2 - 10.1109/ICIP.2014.7025253

DO - 10.1109/ICIP.2014.7025253

M3 - Conference contribution

AN - SCOPUS:84939216500

SN - 9781479957514

SP - 1268

EP - 1272

BT - 2014 IEEE International Conference on Image Processing, ICIP 2014

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this