A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits

S. Ohbayashi; M. Yabuuchi; K. Nii; Y. Tsukamoto; S. Imaoka; Y. Oda; M. Igarashi; M. Takeuchi; H. Kawashima; H. Makino; Y. Yamaguchi; K. Tsukamoto; M. Inuishi; K. Ishibashi; H. Shinohara

A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits

S. Ohbayashi^*, M. Yabuuchi, K. Nii, Y. Tsukamoto, S. Imaoka, Y. Oda, M. Igarashi, M. Takeuchi, H. Kawashima, H. Makino, Y. Yamaguchi, K. Tsukamoto, M. Inuishi, K. Ishibashi, H. Shinohara

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

43 Citations (Scopus)

Abstract

We propose a new design scheme to improve the SRAM read and write operation margins in the presence of a large Vth variability. By applying this scheme to a 0.494 μm² SRAM cell with a β ratio of 1, which is an aggressively small cell size, we can achieve a high-yield 8M-SRAM for a wide range of Vth value using a 65 nm LSTP CMOS technology.

Original language	English
Title of host publication	2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages	17-18
Number of pages	2
Publication status	Published - 2006
Externally published	Yes
Event	2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States Duration: 2006 Jun 15 → 2006 Jun 17

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other	2006 Symposium on VLSI Circuits, VLSIC
Country/Territory	United States
City	Honolulu, HI
Period	06/6/15 → 06/6/17

Keywords

65 nm CMOS
6T-SRAM
Assist circuit
CMOS
Variability
Vth curve

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

Ohbayashi, S., Yabuuchi, M., Nii, K., Tsukamoto, Y., Imaoka, S., Oda, Y., Igarashi, M., Takeuchi, M., Kawashima, H., Makino, H., Yamaguchi, Y., Tsukamoto, K., Inuishi, M., Ishibashi, K., & Shinohara, H. (2006). A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits. In 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers (pp. 17-18). [1705290] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits. / Ohbayashi, S.; Yabuuchi, M.; Nii, K. et al.

2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. 2006. p. 17-18 1705290 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ohbayashi, S, Yabuuchi, M, Nii, K, Tsukamoto, Y, Imaoka, S, Oda, Y, Igarashi, M, Takeuchi, M, Kawashima, H, Makino, H, Yamaguchi, Y, Tsukamoto, K, Inuishi, M, Ishibashi, K & Shinohara, H 2006, A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits. in 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers., 1705290, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 17-18, 2006 Symposium on VLSI Circuits, VLSIC, Honolulu, HI, United States, 06/6/15.

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abstract = "We propose a new design scheme to improve the SRAM read and write operation margins in the presence of a large Vth variability. By applying this scheme to a 0.494 μm2 SRAM cell with a β ratio of 1, which is an aggressively small cell size, we can achieve a high-yield 8M-SRAM for a wide range of Vth value using a 65 nm LSTP CMOS technology.",

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AU - Imaoka, S.

AU - Oda, Y.

AU - Igarashi, M.

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AB - We propose a new design scheme to improve the SRAM read and write operation margins in the presence of a large Vth variability. By applying this scheme to a 0.494 μm2 SRAM cell with a β ratio of 1, which is an aggressively small cell size, we can achieve a high-yield 8M-SRAM for a wide range of Vth value using a 65 nm LSTP CMOS technology.

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KW - Assist circuit

KW - CMOS

KW - Variability

KW - Vth curve

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A 65 nm SoC embedded 6T-SRAM design for manufacturing with read and write cell stabilizing circuits

Abstract

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Keywords

ASJC Scopus subject areas

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