A 65nm embedded SRAM with wafer-level burn-in mode, leak-bit redundancy and E-trim fuse for known good die

Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono, Yuji Oda, Susumu Imaoka, Keiichi Usui, Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Masakazu Qkada, Atsushi Ishii, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A wafer-level burn-in (WLBI) mode, a leak-bit redundancy and a small, highly reliable electrically trimmable (e-trim) fuse repair scheme for an embedded 6T-SRAM is used to achieve a known-good-die SoC. A 16Mb SRAM is fabricated with these techniques using a 65nm low-standby-power technology, and its operation is verified. The WLBI mode has a speed penalty of 50ps. The leak-bit redundancy area penalty is less than 2%.

Original languageEnglish
Title of host publication2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
Pages488-489+617+485
DOIs
Publication statusPublished - 2007 Sep 27
Event54th IEEE International Solid-State Circuits Conference, ISSCC 2007 - San Francisco, CA, United States
Duration: 2007 Feb 112007 Feb 15

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Other

Other54th IEEE International Solid-State Circuits Conference, ISSCC 2007
CountryUnited States
CitySan Francisco, CA
Period07/2/1107/2/15

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Ohbayashi, S., Yabuuchi, M., Kono, K., Oda, Y., Imaoka, S., Usui, K., Yonezu, T., Iwamoto, T., Nii, K., Tsukamoto, Y., Arakawa, M., Uchida, T., Qkada, M., Ishii, A., Makino, H., Ishibashi, K., & Shinohara, H. (2007). A 65nm embedded SRAM with wafer-level burn-in mode, leak-bit redundancy and E-trim fuse for known good die. In 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers (pp. 488-489+617+485). [4242478] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2007.373507