A bit-write-reducing and error-correcting code generation method by clustering ECC codewords for non-volatile memories

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    1 Citation (Scopus)

    Abstract

    Non-volatile memories are paid attention to as a promising alternative to memory design. Data stored in them still may be destructed due to crosstalk and radiation. We can restore the data by using errorcorrecting codes which require extra bits to correct bit errors. Further, nonvolatile memories consume ten to hundred times more energy than normal memories in bit-writing. When we configure them using error-correcting codes, it is quite necessary to reduce writing bits. In this paper, we propose a method to generate a bit-write-reducing code with error-correcting ability. We first pick up an error-correcting code which can correct t-bit errors. We cluster its codeswords and generate a cluster graph satisfying the S-bit flip conditions. We assign a data to be written to each cluster. In other words, we generate one-to-many mapping from each data to the codewords in the cluster. We prove that, if the cluster graph is a complete graph, every data in a memory cell can be re-written into another data by flipping at most S bits keeping error-correcting ability to t bits. We further propose an efficient method to cluster error-correcting codewords. Experimental results show that the bit-write-reducing and error-correcting codes generated by our proposed method efficiently reduce energy consumption. This paper proposes the world-first theoretically near-optimal bit-write-reducing code with error-correcting ability based on the efficient coding theories.

    Original languageEnglish
    Pages (from-to)2398-2411
    Number of pages14
    JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
    VolumeE99A
    Issue number12
    DOIs
    Publication statusPublished - 2016 Dec 1

    Fingerprint

    Code Generation
    Error-correcting Codes
    Clustering
    Data storage equipment
    One to many
    Coding Theory
    Crosstalk
    Flip
    Graph in graph theory
    Complete Graph
    Energy Consumption
    Assign
    Code generation
    Radiation
    Necessary
    Alternatives
    Cell
    Experimental Results
    Energy
    Energy utilization

    Keywords

    • Bit-write-reducing
    • Cluster graph
    • Clustering conditions
    • Error-correcting codes
    • Non-volatile memory
    • REC code
    • S-bit flip conditions
    • S-bound graph

    ASJC Scopus subject areas

    • Signal Processing
    • Computer Graphics and Computer-Aided Design
    • Applied Mathematics
    • Electrical and Electronic Engineering

    Cite this

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    title = "A bit-write-reducing and error-correcting code generation method by clustering ECC codewords for non-volatile memories",
    abstract = "Non-volatile memories are paid attention to as a promising alternative to memory design. Data stored in them still may be destructed due to crosstalk and radiation. We can restore the data by using errorcorrecting codes which require extra bits to correct bit errors. Further, nonvolatile memories consume ten to hundred times more energy than normal memories in bit-writing. When we configure them using error-correcting codes, it is quite necessary to reduce writing bits. In this paper, we propose a method to generate a bit-write-reducing code with error-correcting ability. We first pick up an error-correcting code which can correct t-bit errors. We cluster its codeswords and generate a cluster graph satisfying the S-bit flip conditions. We assign a data to be written to each cluster. In other words, we generate one-to-many mapping from each data to the codewords in the cluster. We prove that, if the cluster graph is a complete graph, every data in a memory cell can be re-written into another data by flipping at most S bits keeping error-correcting ability to t bits. We further propose an efficient method to cluster error-correcting codewords. Experimental results show that the bit-write-reducing and error-correcting codes generated by our proposed method efficiently reduce energy consumption. This paper proposes the world-first theoretically near-optimal bit-write-reducing code with error-correcting ability based on the efficient coding theories.",
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    author = "Tatsuro Kojo and Masashi Tawada and Masao Yanagisawa and Nozomu Togawa",
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    AB - Non-volatile memories are paid attention to as a promising alternative to memory design. Data stored in them still may be destructed due to crosstalk and radiation. We can restore the data by using errorcorrecting codes which require extra bits to correct bit errors. Further, nonvolatile memories consume ten to hundred times more energy than normal memories in bit-writing. When we configure them using error-correcting codes, it is quite necessary to reduce writing bits. In this paper, we propose a method to generate a bit-write-reducing code with error-correcting ability. We first pick up an error-correcting code which can correct t-bit errors. We cluster its codeswords and generate a cluster graph satisfying the S-bit flip conditions. We assign a data to be written to each cluster. In other words, we generate one-to-many mapping from each data to the codewords in the cluster. We prove that, if the cluster graph is a complete graph, every data in a memory cell can be re-written into another data by flipping at most S bits keeping error-correcting ability to t bits. We further propose an efficient method to cluster error-correcting codewords. Experimental results show that the bit-write-reducing and error-correcting codes generated by our proposed method efficiently reduce energy consumption. This paper proposes the world-first theoretically near-optimal bit-write-reducing code with error-correcting ability based on the efficient coding theories.

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