A clock net reassignment algorithm using Voronoi diagram

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

A novel algorithm is presented for the clock net reassignment problem in semi-custom layout design. The clock net reassignment is used to shorten clock nets by reconnecting clock drivers and flip-flops so as to obtain high performance LSIs. The proposed algorithm, by using the Voronoi diagram in computational geometry, is quite efficient and gives better assignments than existing techniques. The experimental results show that the algorithm yields a 10% reduction in net lengths in comparison with existing algorithms. The algorithm takes only 18 s to find an assignment for 167 drivers and 833 flip-flops.

Original languageEnglish
Title of host publication1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers
PublisherPubl by IEEE
Pages420-423
Number of pages4
ISBN (Print)0818620552
Publication statusPublished - 1990
Externally publishedYes
Event1990 IEEE International Conference on Computer-Aided Design - ICCAD-90 - Santa Clara, CA, USA
Duration: 1990 Nov 111990 Nov 15

Publication series

Name1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers

Other

Other1990 IEEE International Conference on Computer-Aided Design - ICCAD-90
CitySanta Clara, CA, USA
Period90/11/1190/11/15

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Edahiro, M. (1990). A clock net reassignment algorithm using Voronoi diagram. In 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (pp. 420-423). (1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers). Publ by IEEE.