A CMOS voltage reference combining body effect with switched-current technique

Ning Ren, Hao Zhang, Tsutomu Yoshihara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    A precise CMOS voltage reference using body effect and switched-current technique is presented in this paper. To reduce static current, the threshold voltage with body effect in nMOSFET transistor is utilized instead of the V BE of BJT transistor. Owning to the switched-current technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 147.44 mV, and the temperature coefficient is less than 5.2 ppm/°C ranging from -20 °C to 100 °C. The voltage line-sensitivity is 0.44 %/V ranging from 1.5 V to 3.3 V. The power-supply-rejection-ratio (PSRR) is -56 dB at 100 Hz. The average current consumption is about 16 μA.

    Original languageEnglish
    Title of host publicationISOCC 2012 - 2012 International SoC Design Conference
    Pages92-95
    Number of pages4
    DOIs
    Publication statusPublished - 2012
    Event2012 International SoC Design Conference, ISOCC 2012 - Jeju Island
    Duration: 2012 Nov 42012 Nov 7

    Other

    Other2012 International SoC Design Conference, ISOCC 2012
    CityJeju Island
    Period12/11/412/11/7

    Fingerprint

    Transistors
    Electric potential
    Threshold voltage
    Networks (circuits)
    Temperature

    Keywords

    • body effect
    • CMOS voltage reference
    • subthreshold
    • switched-current technique

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

    Cite this

    Ren, N., Zhang, H., & Yoshihara, T. (2012). A CMOS voltage reference combining body effect with switched-current technique. In ISOCC 2012 - 2012 International SoC Design Conference (pp. 92-95). [6407047] https://doi.org/10.1109/ISOCC.2012.6407047

    A CMOS voltage reference combining body effect with switched-current technique. / Ren, Ning; Zhang, Hao; Yoshihara, Tsutomu.

    ISOCC 2012 - 2012 International SoC Design Conference. 2012. p. 92-95 6407047.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Ren, N, Zhang, H & Yoshihara, T 2012, A CMOS voltage reference combining body effect with switched-current technique. in ISOCC 2012 - 2012 International SoC Design Conference., 6407047, pp. 92-95, 2012 International SoC Design Conference, ISOCC 2012, Jeju Island, 12/11/4. https://doi.org/10.1109/ISOCC.2012.6407047
    Ren N, Zhang H, Yoshihara T. A CMOS voltage reference combining body effect with switched-current technique. In ISOCC 2012 - 2012 International SoC Design Conference. 2012. p. 92-95. 6407047 https://doi.org/10.1109/ISOCC.2012.6407047
    Ren, Ning ; Zhang, Hao ; Yoshihara, Tsutomu. / A CMOS voltage reference combining body effect with switched-current technique. ISOCC 2012 - 2012 International SoC Design Conference. 2012. pp. 92-95
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    abstract = "A precise CMOS voltage reference using body effect and switched-current technique is presented in this paper. To reduce static current, the threshold voltage with body effect in nMOSFET transistor is utilized instead of the V BE of BJT transistor. Owning to the switched-current technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 147.44 mV, and the temperature coefficient is less than 5.2 ppm/°C ranging from -20 °C to 100 °C. The voltage line-sensitivity is 0.44 {\%}/V ranging from 1.5 V to 3.3 V. The power-supply-rejection-ratio (PSRR) is -56 dB at 100 Hz. The average current consumption is about 16 μA.",
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