A combined SAO and de-blocking filter architecture for HEVC video decoder

Jiayi Zhu; Dajiang Zhou; Gang He; Satoshi Goto

doi:10.1109/ICIP.2013.6738405

A combined SAO and de-blocking filter architecture for HEVC video decoder

Jiayi Zhu, Dajiang Zhou, Gang He, Satoshi Goto

Information, Production and Systems Research Center

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

26 Citations (Scopus)

Abstract

The up-coming video compression standard, high efficiency video coding (HEVC), reduces 50% bit rates in encoding video sequences with same picture quality compared to H.264/AVC. In the in-loop filter (LF) part of HEVC, sample adaptive offset (SAO) is newly added and de-blocking filter (DBF) has been changed a lot. Thus how to construct a high speed and low cost VLSI architecture for HEVC SAO and de-blocking filter is a challenge. In this article, we propose a HEVC LF architecture composed of fully utilized de-blocking filter and SAO. Block based SAO and DBF are employed in this architecture to achieve seamless pipeline between them. The implementation results show that it can be synthesized to 240MHz with 65nm technology. Thus this solution can process 3.84G pixels/s and support 4320p(7680×4320)@120fps decoding.

Original language	English
Title of host publication	2013 IEEE International Conference on Image Processing, ICIP 2013 - Proceedings
Pages	1967-1971
Number of pages	5
DOIs	https://doi.org/10.1109/ICIP.2013.6738405
Publication status	Published - 2013
Event	2013 20th IEEE International Conference on Image Processing, ICIP 2013 - Melbourne, VIC Duration: 2013 Sept 15 → 2013 Sept 18

Other

Other	2013 20th IEEE International Conference on Image Processing, ICIP 2013
City	Melbourne, VIC
Period	13/9/15 → 13/9/18

Keywords

block-layer pipelined
DBF
fully utilized
HEVC
SAO

ASJC Scopus subject areas

Computer Vision and Pattern Recognition

Access to Document

10.1109/ICIP.2013.6738405

Cite this

@inproceedings{cde405c24a22413d8e53cac910f92ee8,

title = "A combined SAO and de-blocking filter architecture for HEVC video decoder",

abstract = "The up-coming video compression standard, high efficiency video coding (HEVC), reduces 50% bit rates in encoding video sequences with same picture quality compared to H.264/AVC. In the in-loop filter (LF) part of HEVC, sample adaptive offset (SAO) is newly added and de-blocking filter (DBF) has been changed a lot. Thus how to construct a high speed and low cost VLSI architecture for HEVC SAO and de-blocking filter is a challenge. In this article, we propose a HEVC LF architecture composed of fully utilized de-blocking filter and SAO. Block based SAO and DBF are employed in this architecture to achieve seamless pipeline between them. The implementation results show that it can be synthesized to 240MHz with 65nm technology. Thus this solution can process 3.84G pixels/s and support 4320p(7680×4320)@120fps decoding.",

keywords = "block-layer pipelined, DBF, fully utilized, HEVC, SAO",

author = "Jiayi Zhu and Dajiang Zhou and Gang He and Satoshi Goto",

year = "2013",

doi = "10.1109/ICIP.2013.6738405",

language = "English",

isbn = "9781479923410",

pages = "1967--1971",

booktitle = "2013 IEEE International Conference on Image Processing, ICIP 2013 - Proceedings",

note = "2013 20th IEEE International Conference on Image Processing, ICIP 2013 ; Conference date: 15-09-2013 Through 18-09-2013",

}

TY - GEN

T1 - A combined SAO and de-blocking filter architecture for HEVC video decoder

AU - Zhu, Jiayi

AU - Zhou, Dajiang

AU - He, Gang

AU - Goto, Satoshi

PY - 2013

Y1 - 2013

N2 - The up-coming video compression standard, high efficiency video coding (HEVC), reduces 50% bit rates in encoding video sequences with same picture quality compared to H.264/AVC. In the in-loop filter (LF) part of HEVC, sample adaptive offset (SAO) is newly added and de-blocking filter (DBF) has been changed a lot. Thus how to construct a high speed and low cost VLSI architecture for HEVC SAO and de-blocking filter is a challenge. In this article, we propose a HEVC LF architecture composed of fully utilized de-blocking filter and SAO. Block based SAO and DBF are employed in this architecture to achieve seamless pipeline between them. The implementation results show that it can be synthesized to 240MHz with 65nm technology. Thus this solution can process 3.84G pixels/s and support 4320p(7680×4320)@120fps decoding.

AB - The up-coming video compression standard, high efficiency video coding (HEVC), reduces 50% bit rates in encoding video sequences with same picture quality compared to H.264/AVC. In the in-loop filter (LF) part of HEVC, sample adaptive offset (SAO) is newly added and de-blocking filter (DBF) has been changed a lot. Thus how to construct a high speed and low cost VLSI architecture for HEVC SAO and de-blocking filter is a challenge. In this article, we propose a HEVC LF architecture composed of fully utilized de-blocking filter and SAO. Block based SAO and DBF are employed in this architecture to achieve seamless pipeline between them. The implementation results show that it can be synthesized to 240MHz with 65nm technology. Thus this solution can process 3.84G pixels/s and support 4320p(7680×4320)@120fps decoding.

KW - block-layer pipelined

KW - DBF

KW - fully utilized

KW - HEVC

KW - SAO

UR - http://www.scopus.com/inward/record.url?scp=84897766874&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84897766874&partnerID=8YFLogxK

U2 - 10.1109/ICIP.2013.6738405

DO - 10.1109/ICIP.2013.6738405

M3 - Conference contribution

AN - SCOPUS:84897766874

SN - 9781479923410

SP - 1967

EP - 1971

BT - 2013 IEEE International Conference on Image Processing, ICIP 2013 - Proceedings

T2 - 2013 20th IEEE International Conference on Image Processing, ICIP 2013

Y2 - 15 September 2013 through 18 September 2013

ER -

A combined SAO and de-blocking filter architecture for HEVC video decoder

Abstract

Other

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this