A cosynthesis algorithm for application specific processors with heterogeneous datapaths

Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    This paper proposes a hardware/software cosynthesis algorithm for processors with heterogeneous registers. Given a CDFG corresponding to an application program and a timing constraint, the algorithm generates a processor configuration minimizing area of the processor and an assembly code on the processor. First, the algorithm configures a datapath which can execute several DFG nodes with data dependency at one cycle. The datapath can execute the application program at the least number of cycles. The branch and bound algorithm is applied and all the number of functional units and memory banks are tried. For an assumed number of functional units and memory banks, an appropriate number of heterogeneous registers and connections to functional units and registers are explored. The experimental results show effectiveness and efficiency of the algorithm.

    Original languageEnglish
    Title of host publicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
    Pages250-255
    Number of pages6
    Publication statusPublished - 2004
    EventProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004 - Yokohama
    Duration: 2004 Jan 272004 Jan 30

    Other

    OtherProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004
    CityYokohama
    Period04/1/2704/1/30

    Fingerprint

    Application programs
    Data storage equipment
    Hardware

    ASJC Scopus subject areas

    • Engineering(all)

    Cite this

    Miyaoka, Y., Togawa, N., Yanagisawa, M., & Ohtsuki, T. (2004). A cosynthesis algorithm for application specific processors with heterogeneous datapaths. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 250-255)

    A cosynthesis algorithm for application specific processors with heterogeneous datapaths. / Miyaoka, Yuichiro; Togawa, Nozomu; Yanagisawa, Masao; Ohtsuki, Tatsuo.

    Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2004. p. 250-255.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Miyaoka, Y, Togawa, N, Yanagisawa, M & Ohtsuki, T 2004, A cosynthesis algorithm for application specific processors with heterogeneous datapaths. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. pp. 250-255, Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, Yokohama, 04/1/27.
    Miyaoka Y, Togawa N, Yanagisawa M, Ohtsuki T. A cosynthesis algorithm for application specific processors with heterogeneous datapaths. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2004. p. 250-255
    Miyaoka, Yuichiro ; Togawa, Nozomu ; Yanagisawa, Masao ; Ohtsuki, Tatsuo. / A cosynthesis algorithm for application specific processors with heterogeneous datapaths. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2004. pp. 250-255
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