TY - JOUR
T1 - A Fast 8K x 8 Mixed CMOS Static RAM
AU - Shinohara, Hirofumi
AU - Anami, Kenji
AU - Yoshihara, Tsutomu
AU - Kohno, Yoshio
AU - Akasaka, Yoichi
AU - Kayano, Shinpei
AU - Kihara, Yuji
N1 - Copyright:
Copyright 2015 Elsevier B.V., All rights reserved.
PY - 1985/9
Y1 - 1985/9
N2 - This paper describes a fast 8K x 8 static RAM fabricated with a mixed CMOS technology. To realize a fast access time and yet a low active power, a block-oriented die architecture with four submodules and a new sense amplifier are applied. An address access time of 34 ns and a chip select access time of 38 ns have been achieved at an active power of 90 mW. In addition to redundant memory cells, the RAM incorporates a spare element disable (SED) function to make it easy to obtain the information of the replaced memory cell. Another feature is a high latchup immunity of the CMOS peripheral circuits. This is obtained from an optimized well structure and guard baids around the wells. A 2-μm design rule combined with the double level polysilicon layer allowed for layout of the NMOS memory cell in 266.5 μm2and design of the die in 34.3 mm2.
AB - This paper describes a fast 8K x 8 static RAM fabricated with a mixed CMOS technology. To realize a fast access time and yet a low active power, a block-oriented die architecture with four submodules and a new sense amplifier are applied. An address access time of 34 ns and a chip select access time of 38 ns have been achieved at an active power of 90 mW. In addition to redundant memory cells, the RAM incorporates a spare element disable (SED) function to make it easy to obtain the information of the replaced memory cell. Another feature is a high latchup immunity of the CMOS peripheral circuits. This is obtained from an optimized well structure and guard baids around the wells. A 2-μm design rule combined with the double level polysilicon layer allowed for layout of the NMOS memory cell in 266.5 μm2and design of the die in 34.3 mm2.
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U2 - 10.1109/T-ED.1985.22199
DO - 10.1109/T-ED.1985.22199
M3 - Article
AN - SCOPUS:0022114977
VL - 32
SP - 1792
EP - 1796
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
SN - 0018-9383
IS - 9
ER -