A fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis

    Research output: Contribution to journalArticle

    Abstract

    This paper proposes a fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis of digital signal processing hardwares. The objective of the algorithm is to minimize the costs for functional units and registers and to maximize connectivity under given computation time and initiation interval. Incorporating the connectivity in a scheduling stage can reduce multiplexer counts in resource binding. The algorithm maximizes connectivity with maintaining low time complexity and obtains datapath designs with totally small hardware costs in the high-level synthesis environment. The algorithm also resolves inter-iteration data dependencies and thus realizes pipelined datapaths. The experimental results demonstrate that the proposed algorithm reduces the multiplexer counts after resource binding with maintaining low costs for functional units and registers compared with eight conventional schedulers.

    Original languageEnglish
    Pages (from-to)1231-1241
    Number of pages11
    JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
    VolumeE81-A
    Issue number6
    Publication statusPublished - 1998

    Fingerprint

    Scheduling algorithms
    Scheduling Algorithm
    Fast Algorithm
    Synthesis
    Connectivity
    Count
    Maximise
    Hardware
    High-level Synthesis
    Costs
    Data Dependency
    Resources
    Unit
    Digital signal processing
    Scheduler
    Low Complexity
    Time Complexity
    Signal Processing
    Resolve
    Scheduling

    Keywords

    • Data-flow graph
    • Gradual time-frame reduction
    • High-level synthesis
    • Resource binding
    • Scheduling

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Hardware and Architecture
    • Information Systems

    Cite this

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    title = "A fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis",
    abstract = "This paper proposes a fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis of digital signal processing hardwares. The objective of the algorithm is to minimize the costs for functional units and registers and to maximize connectivity under given computation time and initiation interval. Incorporating the connectivity in a scheduling stage can reduce multiplexer counts in resource binding. The algorithm maximizes connectivity with maintaining low time complexity and obtains datapath designs with totally small hardware costs in the high-level synthesis environment. The algorithm also resolves inter-iteration data dependencies and thus realizes pipelined datapaths. The experimental results demonstrate that the proposed algorithm reduces the multiplexer counts after resource binding with maintaining low costs for functional units and registers compared with eight conventional schedulers.",
    keywords = "Data-flow graph, Gradual time-frame reduction, High-level synthesis, Resource binding, Scheduling",
    author = "Nozomu Togawa and Masao Yanagisawa and Tatsuo Ohtsuki",
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    AU - Yanagisawa, Masao

    AU - Ohtsuki, Tatsuo

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    AB - This paper proposes a fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis of digital signal processing hardwares. The objective of the algorithm is to minimize the costs for functional units and registers and to maximize connectivity under given computation time and initiation interval. Incorporating the connectivity in a scheduling stage can reduce multiplexer counts in resource binding. The algorithm maximizes connectivity with maintaining low time complexity and obtains datapath designs with totally small hardware costs in the high-level synthesis environment. The algorithm also resolves inter-iteration data dependencies and thus realizes pipelined datapaths. The experimental results demonstrate that the proposed algorithm reduces the multiplexer counts after resource binding with maintaining low costs for functional units and registers compared with eight conventional schedulers.

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