A high assurance on-line recovery technology for a space on-board computer

Hiroyuki Yashiro*, Teruo Fujiwara, Kinji Mori

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

A high assurance on-line recovery technology for a space on-board computer that can be realized using commercial devices is proposed whereby a faulty processor node confirms its normality and then recovers without affecting the other processor nodes in operation. Also, the result of an evaluation test using the broadboard model implementing this technology is reported. Because this technology enables simple and assured recovery of a faulty processor node regardless of its degree of redundancy, it can be applied to various applications, such as a launch vehicle, a satellite, and a reusable launch vehicle. As a result, decreasing the cost of an on-board computer is possible while maintaining its high reliability.

Original languageEnglish
Pages (from-to)1350-1359
Number of pages10
JournalIEICE Transactions on Information and Systems
VolumeE84-D
Issue number10
Publication statusPublished - 2001 Oct
Externally publishedYes

Keywords

  • Assurance
  • Autonomous
  • Fault-tolerance
  • General-purpose
  • GN&C

ASJC Scopus subject areas

  • Information Systems
  • Computer Graphics and Computer-Aided Design
  • Software

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