A high parallel way for processing IQ/IT part of HEVC decoder based on GPU

Lang Ping He, Satoshi Goto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

HEVC (High Efficiency Video Coding) is the newest video compression standard. Compared with the previous standards, the Coding efficiency is greatly improved at the cost of much higher codec complexity. So, many people improve the HEVC algorithm from the hardware level and software level. For the IQ/IT (inverse quantization/inverse transform) part, HEVC just processes one TU block one by one. And TU block size can be 4×4, 8×8, 16×16 and 32×32. So, it costs much decoding time by using this processing. In this paper, we present a parallel way for processing IQ/IT part based on GPU. In HEVC decoder, CABAC decoder only decodes one 64×64 size CTU block's parameters and some syntax elements. So, for now, we can process one 64×64 size Luma block and two 32×32 size Chroma block parallelly by using GPU. And from the experiment results, we can see the computation speed of computing the IQ/IT is about 33 times faster than the HM 12.0's. And finally, we can reduce about 40.7% decoding time compared with HM 12.0's.

Original languageEnglish
Title of host publication2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages211-215
Number of pages5
ISBN (Print)9781479961207
DOIs
Publication statusPublished - 2015 Jan 27
Event2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014 - Kuching, Sarawak
Duration: 2014 Dec 12014 Dec 4

Other

Other2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014
CityKuching, Sarawak
Period14/12/114/12/4

Fingerprint

Inverse transforms
Image coding
Processing
Decoding
Image compression
Graphics processing unit
Hardware
Costs
Experiments

Keywords

  • CU
  • GPU
  • HEVC
  • HM 12.0
  • IQ/IT
  • TU

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Networks and Communications
  • Signal Processing

Cite this

He, L. P., & Goto, S. (2015). A high parallel way for processing IQ/IT part of HEVC decoder based on GPU. In 2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014 (pp. 211-215). [7024454] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISPACS.2014.7024454

A high parallel way for processing IQ/IT part of HEVC decoder based on GPU. / He, Lang Ping; Goto, Satoshi.

2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014. Institute of Electrical and Electronics Engineers Inc., 2015. p. 211-215 7024454.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

He, LP & Goto, S 2015, A high parallel way for processing IQ/IT part of HEVC decoder based on GPU. in 2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014., 7024454, Institute of Electrical and Electronics Engineers Inc., pp. 211-215, 2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014, Kuching, Sarawak, 14/12/1. https://doi.org/10.1109/ISPACS.2014.7024454
He LP, Goto S. A high parallel way for processing IQ/IT part of HEVC decoder based on GPU. In 2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014. Institute of Electrical and Electronics Engineers Inc. 2015. p. 211-215. 7024454 https://doi.org/10.1109/ISPACS.2014.7024454
He, Lang Ping ; Goto, Satoshi. / A high parallel way for processing IQ/IT part of HEVC decoder based on GPU. 2014 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2014. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 211-215
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