A high-parallelism reconfigurable permutation network for IEEE 802.11n\802.16e LDPC decoder

Zhixiang Chen, Xiongxin Zhao, Xiao Peng, Dajiang Zhou, Satoshi Goto

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)

    Abstract

    In this paper, we proposed a high-parallelism permutation network (PN) based on Benes network (BN) for LDPC decoder applied for IEEE 802.11n and 802.16e standards. By exploiting the symmetric property of BN, several groups of data can be cyclically shifted concurrently by our proposed network. Compared to the previous works our proposed PN achieves up to 4 times parallelism while maintaining small implementation area and high frequency. Additionally, based on the proposed PN, we present the architecture of a high-parallelism decoder of which the throughput does not decrease when decoding a short code.

    Original languageEnglish
    Title of host publicationISPACS 2009 - 2009 International Symposium on Intelligent Signal Processing and Communication Systems, Proceedings
    Pages85-88
    Number of pages4
    DOIs
    Publication statusPublished - 2009
    Event2009 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2009 - Kanazawa
    Duration: 2009 Dec 72009 Dec 9

    Other

    Other2009 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2009
    CityKanazawa
    Period09/12/709/12/9

    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Signal Processing
    • Electrical and Electronic Engineering
    • Communication

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  • Cite this

    Chen, Z., Zhao, X., Peng, X., Zhou, D., & Goto, S. (2009). A high-parallelism reconfigurable permutation network for IEEE 802.11n\802.16e LDPC decoder. In ISPACS 2009 - 2009 International Symposium on Intelligent Signal Processing and Communication Systems, Proceedings (pp. 85-88). [5383896] https://doi.org/10.1109/ISPACS.2009.5383896