A high-performance circuit design algorithm using data dependent approximation

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    This paper proposes a high-performance circuit design algorithm using input data dependent approximation. In our algorithm, STEPCs (Suspicious Timing Error Prediction Circuits) are utilized for identifying the paths to be optimized inside a circuit efficiently. Experimental results targeting a set of basic adders show that our algorithm can achieve performance increase by up to 11.1% within the error rate of 2.1% compared to a conventional design technique.

    Original languageEnglish
    Title of host publicationISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages95-96
    Number of pages2
    ISBN (Electronic)9781467393089
    DOIs
    Publication statusPublished - 2016 Dec 27
    Event13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of
    Duration: 2016 Oct 232016 Oct 26

    Other

    Other13th International SoC Design Conference, ISOCC 2016
    CountryKorea, Republic of
    CityJeju
    Period16/10/2316/10/26

    Fingerprint

    Networks (circuits)
    approximation
    adding circuits
    Adders
    time measurement
    predictions

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering
    • Instrumentation

    Cite this

    Kawamura, K., Yanagisawa, M., & Togawa, N. (2016). A high-performance circuit design algorithm using data dependent approximation. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things (pp. 95-96). [7799750] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2016.7799750

    A high-performance circuit design algorithm using data dependent approximation. / Kawamura, Kazushi; Yanagisawa, Masao; Togawa, Nozomu.

    ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., 2016. p. 95-96 7799750.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Kawamura, K, Yanagisawa, M & Togawa, N 2016, A high-performance circuit design algorithm using data dependent approximation. in ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things., 7799750, Institute of Electrical and Electronics Engineers Inc., pp. 95-96, 13th International SoC Design Conference, ISOCC 2016, Jeju, Korea, Republic of, 16/10/23. https://doi.org/10.1109/ISOCC.2016.7799750
    Kawamura K, Yanagisawa M, Togawa N. A high-performance circuit design algorithm using data dependent approximation. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc. 2016. p. 95-96. 7799750 https://doi.org/10.1109/ISOCC.2016.7799750
    Kawamura, Kazushi ; Yanagisawa, Masao ; Togawa, Nozomu. / A high-performance circuit design algorithm using data dependent approximation. ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 95-96
    @inproceedings{25808f0fcf5745f889f2c8b4649d467c,
    title = "A high-performance circuit design algorithm using data dependent approximation",
    abstract = "This paper proposes a high-performance circuit design algorithm using input data dependent approximation. In our algorithm, STEPCs (Suspicious Timing Error Prediction Circuits) are utilized for identifying the paths to be optimized inside a circuit efficiently. Experimental results targeting a set of basic adders show that our algorithm can achieve performance increase by up to 11.1{\%} within the error rate of 2.1{\%} compared to a conventional design technique.",
    author = "Kazushi Kawamura and Masao Yanagisawa and Nozomu Togawa",
    year = "2016",
    month = "12",
    day = "27",
    doi = "10.1109/ISOCC.2016.7799750",
    language = "English",
    pages = "95--96",
    booktitle = "ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things",
    publisher = "Institute of Electrical and Electronics Engineers Inc.",
    address = "United States",

    }

    TY - GEN

    T1 - A high-performance circuit design algorithm using data dependent approximation

    AU - Kawamura, Kazushi

    AU - Yanagisawa, Masao

    AU - Togawa, Nozomu

    PY - 2016/12/27

    Y1 - 2016/12/27

    N2 - This paper proposes a high-performance circuit design algorithm using input data dependent approximation. In our algorithm, STEPCs (Suspicious Timing Error Prediction Circuits) are utilized for identifying the paths to be optimized inside a circuit efficiently. Experimental results targeting a set of basic adders show that our algorithm can achieve performance increase by up to 11.1% within the error rate of 2.1% compared to a conventional design technique.

    AB - This paper proposes a high-performance circuit design algorithm using input data dependent approximation. In our algorithm, STEPCs (Suspicious Timing Error Prediction Circuits) are utilized for identifying the paths to be optimized inside a circuit efficiently. Experimental results targeting a set of basic adders show that our algorithm can achieve performance increase by up to 11.1% within the error rate of 2.1% compared to a conventional design technique.

    UR - http://www.scopus.com/inward/record.url?scp=85010409235&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=85010409235&partnerID=8YFLogxK

    U2 - 10.1109/ISOCC.2016.7799750

    DO - 10.1109/ISOCC.2016.7799750

    M3 - Conference contribution

    AN - SCOPUS:85010409235

    SP - 95

    EP - 96

    BT - ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things

    PB - Institute of Electrical and Electronics Engineers Inc.

    ER -