A highly reliable gate/n- overlapped transistor for mega-bit DRAMs

M. Nagatomo*, Y. Okumura, K. Mitsui, I. Ogoh, H. Genjoh, M. Inuishi, T. Matsukawa

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)


A noble gate/N- overlapped Tr. fabricated using oblique rotating ion implantation technique was developed. It is confirmed that this Tr. meets high performance M bit DRAMs' requirements, that is, high drain current, enough punchthrough voltage and low substrate current. The mechanism of this Tr.'s action is analyzed by simulation and is concluded that peak position of electric field is located far from the drain current pass in this Tr.'s structure. The maximum electric field is also relaxed by formation of N- layer using oblique ion implantation.

Original languageEnglish
Title of host publicationESSDERC 1989 - Proceedings of the 19th European Solid State Device Research Conference
EditorsAnton Heuberger, Heiner Ryssel, Peter Lange
PublisherIEEE Computer Society
Number of pages4
ISBN (Electronic)0387510001
ISBN (Print)9780387510002
Publication statusPublished - 1989 Jan 1
Externally publishedYes
Event19th European Solid State Device Research Conference, ESSDERC 1989 - Berlin, Germany
Duration: 1989 Sep 111989 Sep 14

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876


Other19th European Solid State Device Research Conference, ESSDERC 1989

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality


Dive into the research topics of 'A highly reliable gate/n<sup>-</sup> overlapped transistor for mega-bit DRAMs'. Together they form a unique fingerprint.

Cite this