A loop structure optimization targeting high-level synthesis of fast number theoretic transform

Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Multiplication with a large number of digits is heavily used when processing data encrypted by a fully homomorphic encryption, which is a bottleneck in computation time. An algorithm utilizing fast number theoretic transform (FNTT) is known as a high-speed multiplication algorithm and the further speeding up is expected by implementing the FNTT process on an FPGA. A high-level synthesis tool enables efficient hardware implementation even for FNTT with a large number of points. In this paper, we propose a methodology for optimizing the loop structure included in a software description of FNTT so that the performance of the synthesized FNTT processor can be maximized. The loop structure optimization is considered in terms of loop flattening and trip count reduction. We implement a 65,536-point FNTT processor with the loop structure optimization on an FPGA, and demonstrate that it can be executed 6.9 times faster than the execution on a CPU.

Original languageEnglish
Title of host publication2018 19th International Symposium on Quality Electronic Design, ISQED 2018
PublisherIEEE Computer Society
Pages106-111
Number of pages6
ISBN (Electronic)9781538612149
DOIs
Publication statusPublished - 2018 May 9
Event19th International Symposium on Quality Electronic Design, ISQED 2018 - Santa Clara, United States
Duration: 2018 Mar 132018 Mar 14

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2018-March
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other19th International Symposium on Quality Electronic Design, ISQED 2018
CountryUnited States
CitySanta Clara
Period18/3/1318/3/14

Keywords

  • FPGA
  • fully homomorphic encryption (FHE)
  • high-level synthesis (HLS)
  • loop optimization
  • number theoretic transform (NTT)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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